SPRUIM2J May 2020 – May 2026 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
Two bits in the power and emulation management register - ICSS_G_PR1_ICSS_UART_UART_SLV_PWREMU_MGMT, control resetting the parts of the PRU_ICSSG UART0:
In each case, putting the receiver and/or transmitter in reset will reset the state machine of the affected portion but will not affect the PRU_ICSSG UART0 registers.