SPRUIM2J May 2020 – May 2026 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
Register Description: The DRM Suspend Registers merge the emulation suspend signals sent by various processors, when it wishes to suspend the activity of connected peripherals during debugging. There can be upto 128 of these registers (See NUM_PERIPHERALS in the DRM_CAPABILITY register)
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| Instance Name | Physical Address |
|---|---|
| DEBUGSS_WRAP0_drm_cfg_0 | 7200 02200h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED1 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED1 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED1 | SELECT | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| SELECT | RESERVED0 | SUSPEND_CTL | |||||
| R/W | R | R/W | |||||
| 0h | 0h | 0h | |||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:9 | RESERVED1 | R | 0h | Reserved, returns 0 |
| 8:4 | SELECT | R/W | 0h | Selects which suspend control line [1-32] goes to the peripheral |
| 3:1 | RESERVED0 | R | 0h | Reserved, returns 0 |
| 0 | SUSPEND_CTL | R/W | 0h | When 1, the peripheral is sensitive to the suspend signal, when 0, it ignore it |