SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
The ARM Core Cortex-R5F processor subsystem (R5FSS) supports the following main features:
R5FSS Memory System
4x ways
SECDED ECC protected per 32 bits
Full-precision Floating Point (VFPv3)
16-region Memory Protection Unit (MPU)
8 breakpoints, 8 watch points
CoreSight Debug Access Port (DAP)
CoreSight ETM-R5 interface (CTI, ETM)
Performance Monitoring Unit (PMU)
32-bit to 36-bit Region-based Address Translation (RAT) on memory access initiators
Integrated Vectored Interrupt Manager (VIM) per core with 256 Interrupt Inputs each
CORE0 has 64KB of TCM.