SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
In peripheral mode, the interrupt events related to the state of the MCSPI_TXi register are TX0_EMPTY and TX0_UNDERFLOW. The interrupt events related to the state of the MCSPI_RXi are RX0_FULL and RX0_OVERFLOW (channels 1, 2, and 3 do not have a receiver overflow status bit). See the MCSPI_IRQSTATUS register.