Geometric distortions, barrel and pincushion distortion, can be corrected on UYVY and NV12 data formats. The Mesh based back mapping is used in this mode. An additional affine transform can be configured at the same time.
- Check and wait for LDC_CORE_CTRL[2] BUSY to
become IDLE (0).
- Set LDC_CORE_CTRL[4-3] IP_DATAMODE for UYVY (0)
or NV12 data (2). Program LDC_CORE_CTRL[6-5] IP_DFMT to required data storage
format.
- Set LDC_CORE_CTRL[1] LDMAPEN = 1 to enable lens
distortion back mapping.
- Set the input frame base address in
LDC_CORE_RD_BASE_H / LDC_CORE_RD_BASE_L registers. Note that the frame base
address must be aligned on a 16-byte boundary. In case of YUV420, YUV422SP,
Y1_Y2 and Y1_Y2Y3 modes, configure LDC_CORE_RD_420C_BASE_H /
LDC_CORE_RD_420C_BASE_L registers for Chroma Data.
- Set the input frame line offset in
LDC_CORE_RD_OFST[15-0] OFST.
- If reading the input image from a circular buffer:
- Set LDC_CORE_CTRL[9] IP_CIRCEN = 1.
- LDC computes the row number and applies modulo
operation. The absolute address in the buffer is computed from this
wrap-around row and the column number and then data is fetched from the
circular buffer. Set the circular buffer size in LDC_CORE_RD_OFST[29-16]
MOD register field. In YUV420 modes, the number of rows in the buffer is
MOD/2. In others modes, the number of rows in the buffer is MOD for both
Y buffer and Cb/Cr buffer.
- Set the tile size in
VPAC_LDC_REGION_OUT_BLKSZ_j[15-8] OBH and
VPAC_LDC_REGION_OUT_BLKSZ_j[7:0] OBW. Note the
constraints on OBW in Table 7-110.
- Set the pixel pad in
VPAC_LDC_REGION_OUT_BLKSZ_j[19-16] PIXPAD.
- Set the input frame size in
LDC_CORE_INPUT_FRSZ[29-16] H and LDC_CORE_INPUT_FRSZ[13-0] W.
- Set the output frame size in
LDC_CORE_MESH_FRSZ[29-16] H and LDC_CORE_MESH_FRSZ[13:0] W. Mesh data has to be
present for entire frame after transform.
- Set the output compute frame size in
LDC_CORE_COMPUTE_FRSZ[29-16] H and LDC_CORE_COMPUTE_FRSZ[13-0] W.
- Set the starting output point in
LDC_CORE_INITXY[12-0] INITX and LDC_CORE_INITXY[28-16] INITY.
- Configure SL2 Interface programming registers. Details of LSE configuration is captured in Section 7.7.4.3.4.
- Set the mesh offset table pointer to the correct
address (LDC_CORE_MESH_BASE_H / LDC_CORE_MESH_BASE_I[31-0] ADDR and
LDC_CORE_MESH_OFST[15-0] OFST). Set the table down sampling factor for MxM down
sampling in LDC_CORE_MESHTABLE_CFG[2-0] M.
- Set the Y plane interpolation type to bilinear or
bi-cubic in LDC_CORE_CFG[6] YINT_TYP.
- If also using affine transform, set the six
affine transform parameters in LDC_CORE_AFF_AB.A, LDC_CORE_AFF_AB.B,
LDC_CORE_AFF_CD.C, LDC_CORE_AFF_CD.D, LDC_CORE_AFF_EF.E, and LDC_CORE_AFF_EF.F.
If affine transform is not used, then these need to be set to the following
values: A = 4096, B = 0, C = 0, D = 0, E = 4096, and F = 0.
- If also using perspective transform, enable
LDC_CORE_CTRL[7] PWARPEN and set LDC_CORE_PWARP_GH[15-0] G and
LDC_CORE_PWARP_GH[31-16] H. If perspective transform is not used, disable
LDC_CORE_CTRL[7] PWARPEN and set LDC_CORE_PWARP_GH[15-0] G = 0 and
LDC_CORE_PWARP_GH[31-16] H = 0.
- Set LDC_CORE_CTRL[0] LDC_EN = 1 to start the LDC
operation.
- Start the HTS init sequencing. LDC fetch/processing is gated with hts_init.
- Wait for LDC_CORE_CTRL[2] BUSY to become IDLE (0)
or wait for the end of frame completion interrupt.