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AM263P2-Q1

現行

具有即時控制及可擴充記憶體且最高 400MHz 的車用雙核 Arm® Cortex®-R5F MCU

立即訂購
產品規格表
使用指南
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AM263P2-Q1

現行
產品規格表 立即訂購

產品詳細資料

CPU Arm Cortex-R5F Frequency (MHz) 400 RAM (kByte) 3072 ADC type 5 12-bit SAR Total processing (MIPS) 0.0008 Features CAN, CAN FD, EnDat 2.2, Ethernet, External memory interface, Hardware encrpytion (AES/DES/SHA/MD5), I2C, OSPI, QSPI, SD/SDIO, SPI, UART UART 6 CAN (#) 8 (CAN-FD) PWM (Ch) 64 Number of ADC channels 30 SPI 8 Operating temperature range (°C) -40 to 150 Rating Automotive Communication interface CAN, CAN-FD, I2C, OSPI, QSPI, SD/SDIO, SPI, UART Operating system AutoSAR, FreeRTOS, Zephyr RTOS Hardware accelerators Trigonometric math accelerator Number of GPIOs 140 Number of I2Cs 4 Security Cryptographic acceleration, Device lifecycle management, Secure boot, Secure debug, Secure provisioning
CPU Arm Cortex-R5F Frequency (MHz) 400 RAM (kByte) 3072 ADC type 5 12-bit SAR Total processing (MIPS) 0.0008 Features CAN, CAN FD, EnDat 2.2, Ethernet, External memory interface, Hardware encrpytion (AES/DES/SHA/MD5), I2C, OSPI, QSPI, SD/SDIO, SPI, UART UART 6 CAN (#) 8 (CAN-FD) PWM (Ch) 64 Number of ADC channels 30 SPI 8 Operating temperature range (°C) -40 to 150 Rating Automotive Communication interface CAN, CAN-FD, I2C, OSPI, QSPI, SD/SDIO, SPI, UART Operating system AutoSAR, FreeRTOS, Zephyr RTOS Hardware accelerators Trigonometric math accelerator Number of GPIOs 140 Number of I2Cs 4 Security Cryptographic acceleration, Device lifecycle management, Secure boot, Secure debug, Secure provisioning
NFBGA (ZCZ) 324 225 mm² 15 x 15

Processor Cores:

  • Single, dual, and quad-core Arm Cortex-R5F MCU with each core running up to 400MHz
    • 16KB I-cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • x256 integrated VIM per CPU Core
    • 256KB Tightly-Coupled Memory (TCM) with 32-bit ECC per CPU core cluster
    • Lockstep or Dual-core capable clusters
  • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
    • Up to 4x, one per R5F MCU core

Memory:

  • 1x Flash Subsystem with OptiFlash memory technology and eXecute In Place (XIP) support
    • 1x Octal Serial Peripheral Interface (OSPI), up to 133MHz SDR and DDR
    • AM263P Flash-in-Package (ZCZ_F) variant includes 8MB OSPI Flash
  • 3MB of On-Chip RAM (OCSRAM)
    • 6 Banks x 512KB
    • ECC error protection
    • Internal DMA engine support
    • Remote L2 Cache for external memory, software programmable up to 128KB per CPU core

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
    • 2x Transfer Controllers (TPTC)
    • 1x Channel Controller (TPCC)
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)
    • QSPI NOR Flash (4S/1S) (Primary)
    • OSPI NOR Flash (8S 50MHz SDR Mode0, 8S 25MHz DDR XSPI) (Primary)
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
  • Timer Modules:
    • 4x Windowed Watchdog Timer (WWDT)
    • 8x Real Time Interrupt (RTI) timer

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 8x Serial Peripheral Interface (SPI) controllers
  • 5x Local Interconnect Network (LIN) ports
  • 4x Inter-Integrated Circuit (I2C) ports
  • 8x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 4x Fast Serial Interface Transmitters (FSITX)
  • 4x Fast Serial Interface Receivers (FSIRX)
  • Up to 139 General-Purpose I/O (GPIO) pins

Sensing & Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 5x 12-bit Analog-to-Digital Converters (ADC)
    • 6-input SAR ADC up to 4MSPS
      • 6x Single-ended channels OR
      • 3x Differential channels
    • Highly Configurable ADC Digital Logic
      • XBAR Start of Conversion Triggers (SOC)
      • User-defined Sample and Hold (S+H)
      • Flexible Post-processing Blocks (PPB)
  • 1x Resolver subsystem (ZCZ-S and ZCZ-F packages) with:
    • 2x Resolver to Digital Converter (RDC) OR
    • 2x 12-bit ADCs can also be used for general purpose
      • 4-input SAR ADC up to 3MSPS
        • 4x Single-ended channels OR
        • 2x Differential channels
  • 10x Analog Comparators with Type-A programmable DAC reference (CMPSSA)
  • 10x Analog Comparators with Type-B programmable DAC reference (CMPSSB)
  • 1x 12-bit Digital-to-Analog Converter (DAC)
  • 32x Pulse Width Modulation (EPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Extended HRPWM time resolution
  • 16x Enhanced Capture (ECAP) modules
  • 3x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x 4-Ch Sigma-Delta Filter Modules (SDFM)
  • Additional Signal-multiplex Crossbars (XBAR)

Industrial Connectivity:

  • Programmable Real-Time Unit - Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Real-Time Unit Subsystem (PRU0 / PRU1)
      • Deterministic Hardware
      • Dynamic Firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 16KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™,
      • PROFINET, IO-Link for order
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High-Speed Interfaces:

  • Integrated 3-port Gigabit Ethernet switch (CPSW) supporting up to two external ports
    • MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine-based Packet Classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/UDP/TCP checksum offload in hardware

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
    • Arm Cortex-M4F based dedicated security controller
    • Isolated and secured RAMs
    • Peripherals like Timers, WWDT, RTC, Interrupt Controller
    • Safety related peripherals like CRC, ESM, PBIST
  • Secure boot support
    • Device Take Over Protection
    • Hardware-enforced root-of-trust (RoT)
      • Support for two sets of RoT keys
    • Authenticated boot support
      • Encrypted boot support
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after cryptographic authentication
    • Support for permanent debug/JTAG disable
  • Device ID and Key Management
    • Unique ID (SoC ID)
    • Support for OTP Memory (FUSEROM)
  • Extensive Firewall Support
    • System Memory Protection Units (MPU) present at various interfaces
  • Cryptographic Acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • Deterministic random bit generator (DRBG) with pseudo and true random number generator (TRNG)
    • Public Key Accelerator (PKA) to assist in RSA/Elliptic Curve Cryptography (ECC) processing

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM) with designated SAFETY_ERRORn pin
    • ECC or parity on calculation-critical memories
    • 4x Dual Clock Comparators (DCC)
    • 3x Self-Test Controller (STC)
    • Programmable Built-In Self-Test (PBIST) and fault-injection for CPU and on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant targeted [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3 targeted
    • Hardware integrity up to SIL-3 targeted
    • Safety-related certification
      • IEC 61508 planned
  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D targeted
    • Hardware integrity up to ASIL-D targeted
    • Safety-related certification
      • ISO 26262 planned

Data Storage

  • 1x 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface

Power Management

  • Recommended TPS653860-Q1 Power Management ICs (PMIC)
    • Companion PMIC specially designed to meet device power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • 45nm technology
  • ZCZ Package
    • AM263x Compatible (ZCZ-C)
      • Pin-to-Pin compatible option with AM263x
    • AM263Px Resolver (ZCZ-S)
      • Adds new Resolver Subsystem functionality
    • AM263Px Resolver with Flash-in-Package (ZCZ-F)
      • Includes 1x internally connected Silicon in Package (SIP) 64Mb ISSI IS25LX064-JWLA3 OSPI Flash device; up to 133MHz SDR and DDR
    • 324-pin NFBGA
    • 15.0mm x 15.0mm
    • 0.8mm pitch

Processor Cores:

  • Single, dual, and quad-core Arm Cortex-R5F MCU with each core running up to 400MHz
    • 16KB I-cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • x256 integrated VIM per CPU Core
    • 256KB Tightly-Coupled Memory (TCM) with 32-bit ECC per CPU core cluster
    • Lockstep or Dual-core capable clusters
  • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
    • Up to 4x, one per R5F MCU core

Memory:

  • 1x Flash Subsystem with OptiFlash memory technology and eXecute In Place (XIP) support
    • 1x Octal Serial Peripheral Interface (OSPI), up to 133MHz SDR and DDR
    • AM263P Flash-in-Package (ZCZ_F) variant includes 8MB OSPI Flash
  • 3MB of On-Chip RAM (OCSRAM)
    • 6 Banks x 512KB
    • ECC error protection
    • Internal DMA engine support
    • Remote L2 Cache for external memory, software programmable up to 128KB per CPU core

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
    • 2x Transfer Controllers (TPTC)
    • 1x Channel Controller (TPCC)
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)
    • QSPI NOR Flash (4S/1S) (Primary)
    • OSPI NOR Flash (8S 50MHz SDR Mode0, 8S 25MHz DDR XSPI) (Primary)
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
  • Timer Modules:
    • 4x Windowed Watchdog Timer (WWDT)
    • 8x Real Time Interrupt (RTI) timer

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 8x Serial Peripheral Interface (SPI) controllers
  • 5x Local Interconnect Network (LIN) ports
  • 4x Inter-Integrated Circuit (I2C) ports
  • 8x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 4x Fast Serial Interface Transmitters (FSITX)
  • 4x Fast Serial Interface Receivers (FSIRX)
  • Up to 139 General-Purpose I/O (GPIO) pins

Sensing & Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 5x 12-bit Analog-to-Digital Converters (ADC)
    • 6-input SAR ADC up to 4MSPS
      • 6x Single-ended channels OR
      • 3x Differential channels
    • Highly Configurable ADC Digital Logic
      • XBAR Start of Conversion Triggers (SOC)
      • User-defined Sample and Hold (S+H)
      • Flexible Post-processing Blocks (PPB)
  • 1x Resolver subsystem (ZCZ-S and ZCZ-F packages) with:
    • 2x Resolver to Digital Converter (RDC) OR
    • 2x 12-bit ADCs can also be used for general purpose
      • 4-input SAR ADC up to 3MSPS
        • 4x Single-ended channels OR
        • 2x Differential channels
  • 10x Analog Comparators with Type-A programmable DAC reference (CMPSSA)
  • 10x Analog Comparators with Type-B programmable DAC reference (CMPSSB)
  • 1x 12-bit Digital-to-Analog Converter (DAC)
  • 32x Pulse Width Modulation (EPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Extended HRPWM time resolution
  • 16x Enhanced Capture (ECAP) modules
  • 3x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x 4-Ch Sigma-Delta Filter Modules (SDFM)
  • Additional Signal-multiplex Crossbars (XBAR)

Industrial Connectivity:

  • Programmable Real-Time Unit - Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Real-Time Unit Subsystem (PRU0 / PRU1)
      • Deterministic Hardware
      • Dynamic Firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 16KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™,
      • PROFINET, IO-Link for order
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High-Speed Interfaces:

  • Integrated 3-port Gigabit Ethernet switch (CPSW) supporting up to two external ports
    • MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine-based Packet Classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/UDP/TCP checksum offload in hardware

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
    • Arm Cortex-M4F based dedicated security controller
    • Isolated and secured RAMs
    • Peripherals like Timers, WWDT, RTC, Interrupt Controller
    • Safety related peripherals like CRC, ESM, PBIST
  • Secure boot support
    • Device Take Over Protection
    • Hardware-enforced root-of-trust (RoT)
      • Support for two sets of RoT keys
    • Authenticated boot support
      • Encrypted boot support
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after cryptographic authentication
    • Support for permanent debug/JTAG disable
  • Device ID and Key Management
    • Unique ID (SoC ID)
    • Support for OTP Memory (FUSEROM)
  • Extensive Firewall Support
    • System Memory Protection Units (MPU) present at various interfaces
  • Cryptographic Acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • Deterministic random bit generator (DRBG) with pseudo and true random number generator (TRNG)
    • Public Key Accelerator (PKA) to assist in RSA/Elliptic Curve Cryptography (ECC) processing

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM) with designated SAFETY_ERRORn pin
    • ECC or parity on calculation-critical memories
    • 4x Dual Clock Comparators (DCC)
    • 3x Self-Test Controller (STC)
    • Programmable Built-In Self-Test (PBIST) and fault-injection for CPU and on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant targeted [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3 targeted
    • Hardware integrity up to SIL-3 targeted
    • Safety-related certification
      • IEC 61508 planned
  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D targeted
    • Hardware integrity up to ASIL-D targeted
    • Safety-related certification
      • ISO 26262 planned

Data Storage

  • 1x 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface

Power Management

  • Recommended TPS653860-Q1 Power Management ICs (PMIC)
    • Companion PMIC specially designed to meet device power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • 45nm technology
  • ZCZ Package
    • AM263x Compatible (ZCZ-C)
      • Pin-to-Pin compatible option with AM263x
    • AM263Px Resolver (ZCZ-S)
      • Adds new Resolver Subsystem functionality
    • AM263Px Resolver with Flash-in-Package (ZCZ-F)
      • Includes 1x internally connected Silicon in Package (SIP) 64Mb ISSI IS25LX064-JWLA3 OSPI Flash device; up to 133MHz SDR and DDR
    • 324-pin NFBGA
    • 15.0mm x 15.0mm
    • 0.8mm pitch

The AM263Px Sitara™ Arm® Microcontrollers are built to meet the complex real-time processing needs of next generation industrial and automotive embedded products. The AM263Px MCU family consists of multiple pin-to-pin compatible devices with up to four 400MHz Arm® Cortex®-R5F cores. As an option, the Arm® R5F subsystem can be programmed to run in lockstep or dual-core mode for multiple functional safety configurations. The industrial communications subsystem (PRU-ICSS) enables integrated industrial Ethernet communication protocols such as PROFINET®, Ethernet/IP®, EtherCAT® (among many others), standard Ethernet connectivity, and even custom I/O interfaces. The family is designed for the future of motor control and digital power applications with advanced analog sensing and digital actuation modules.

The multiple R5F cores are arranged in cluster subsystems with 256KB of shared tightly coupled memory (TCM) along with 3MB of shared SRAM, greatly reducing the need for external memory. Extensive ECC is included for on-chip memories, peripherals, and interconnects for enhanced reliability. Granular firewalls managed by the Hardware Security Manager (HSM) enable developers to implement stringent security-minded system design requirements. Cryptographic acceleration and secure boot are also available on AM263Px devices.

TI provides a complete set of microcontroller software and development tools for the AM263Px family of microcontrollers.

The AM263Px Sitara™ Arm® Microcontrollers are built to meet the complex real-time processing needs of next generation industrial and automotive embedded products. The AM263Px MCU family consists of multiple pin-to-pin compatible devices with up to four 400MHz Arm® Cortex®-R5F cores. As an option, the Arm® R5F subsystem can be programmed to run in lockstep or dual-core mode for multiple functional safety configurations. The industrial communications subsystem (PRU-ICSS) enables integrated industrial Ethernet communication protocols such as PROFINET®, Ethernet/IP®, EtherCAT® (among many others), standard Ethernet connectivity, and even custom I/O interfaces. The family is designed for the future of motor control and digital power applications with advanced analog sensing and digital actuation modules.

The multiple R5F cores are arranged in cluster subsystems with 256KB of shared tightly coupled memory (TCM) along with 3MB of shared SRAM, greatly reducing the need for external memory. Extensive ECC is included for on-chip memories, peripherals, and interconnects for enhanced reliability. Granular firewalls managed by the Hardware Security Manager (HSM) enable developers to implement stringent security-minded system design requirements. Cryptographic acceleration and secure boot are also available on AM263Px devices.

TI provides a complete set of microcontroller software and development tools for the AM263Px family of microcontrollers.

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重要文件 類型 標題 格式選項 日期
* Data sheet AM263Px Sitara™ Microcontrollers with Optional Flash-in-Package datasheet (Rev. D) PDF | HTML 2025年 5月 19日
* Errata AM263Px Errata Document (Rev. C) PDF | HTML 2025年 7月 14日
* User guide AM263Px Sitara Microcontrollers Technical Reference Manual (Rev. D) PDF | HTML 2025年 7月 29日
* User guide AM263Px Sitara Microcontrollers Register Addendum (Rev. B) 2025年 6月 2日
White paper Integrating EVCC, DCDC, and Host Architecture: TI Automotive MCUs for Next-Generation EV Charging (Rev. A) PDF | HTML 2025年 11月 13日
Product overview AM26xx Family TIFS-SDK Product Brief PDF | HTML 2025年 5月 29日
Functional safety information AM263Px TÜV SÜD Functional Safety Certificate 2025年 5月 27日
Functional safety information AM263Px TÜV SÜD Functional Safety Certificate Report 2025年 5月 27日
Application note AM26x Custom PCB System Getting Started Guide (Rev. A) PDF | HTML 2025年 5月 13日
User guide AM26x Hardware Design Guidelines (Rev. D) PDF | HTML 2025年 5月 2日
User guide AM263Px MCAL user guide 2025年 4月 28日
Application note How to Synchronize the Timing Between Chips With Programmable Real-Time Unit PDF | HTML 2025年 3月 10日
Functional safety information AM263x and AM263Px Software Diagnostics Library TUV SUD Functional Safety Certificate (Rev. A) 2025年 2月 25日
Application note Enabling Trace on AM26x Devices with Lauterbach® PDF | HTML 2024年 12月 18日
Application note AM26x Family Migration Overview (Rev. A) PDF | HTML 2024年 11月 15日
Application brief Achieving Faster Secure Boot Time on AM26x Devices PDF | HTML 2024年 11月 13日
White paper Enhancing System Performance Using Optiflash Memory Technology PDF | HTML 2024年 10月 14日
Technical article 開發新一代電氣化推進系統 PDF | HTML 2024年 5月 20日
User guide AM263P OSPI, QSPI Flash Selection Guide PDF | HTML 2024年 4月 22日
Application note AM263Px Control Card Quick Start Guide PDF | HTML 2024年 1月 12日
Application note Clock Edge Delay Compensation With Isolated Modulators Digital Interface to MCUs (Rev. A) PDF | HTML 2024年 1月 12日
Technical article How OptiFlash memory technology leverages external flash to solve challenges in software-defined systems PDF | HTML 2024年 1月 5日
Technical article Three key components needed to boost performance of next generation EV traction inverters PDF | HTML 2024年 1月 5日
Application note OptiFlash Memory Technology (Rev. A) PDF | HTML 2023年 11月 27日
Product overview Functional Safety for AM2x and Hercules™ Microcontrollers PDF | HTML 2023年 11月 8日
EVM User's guide AM263x Sitara Control Card Hardware User's Guide (Rev. D) PDF | HTML 2023年 9月 14日
Application note Sitara MCU Thermal Design PDF | HTML 2023年 9月 11日
Application note Using the Sitara MCU AM263x in an Automotive SiC Traction Inverter PDF | HTML 2023年 8月 16日
Application note Integration of MbedTLS on SITARA MCU Devices PDF | HTML 2023年 8月 3日
White paper Time Sensitive Networking for Industrial Automation (Rev. C) 2023年 7月 31日
Application note Intra Drive Communication Using 8b-10b Line Code With Programmable Real Time Uni PDF | HTML 2023年 5月 24日
Application note Interfacing 5V Sensors and Signals to 3.3V Input SAR ADCs PDF | HTML 2023年 2月 9日
Application note DCC Computation Tool PDF | HTML 2023年 2月 3日
Application note Debugging Sitara AM2x Microcontrollers PDF | HTML 2022年 10月 24日
Technical article What is “real-time control” and why do you need it? PDF | HTML 2022年 4月 6日
Technical article How MCUs can unlock the full potential of electrification designs PDF | HTML 2022年 3月 21日

設計與開發

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開發板

DP83826-EVM-AM2 — 適用於工業乙太網路 PHY 附加電路板的 AM2x 評估模組

DP83826-EVM-AM2 是一款工業乙太網路 PHY 附加電路板，可搭配 AM2x 系列 Sitara™ 高性能微控制器評估模組使用。此附加電路板適合使用 AM2x EVM 進行初始乙太網路評估與原型設計。DP83826-EVM-AM2 配備了有 MII 介面與強化模式的 TI DP83826 低延遲 10/100Mbps PHY，以及標準 RJ45 乙太網路連網連接器。TMDSCNCD263P 和 AM263Px MCU PLUS SDK 目前均支援 DP83826-EVM-AM2。
使用指南: PDF | HTML
TI.com 無法提供
開發板

DP83TG720-EVM-AM2 — 適用於汽車乙太網路 PHY 附加電路板的 AM2x 評估模組

DP83TG720-EVM-AM2 是一款汽車乙太網路 PHY 附加電路板，可搭配 AM2x 系列 Sitara™ 高性能微控制器評估模組使用。此附加電路板適合使用 AM2x EVM 進行初始乙太網路評估與原型設計。DP83TG720-EVM-AM2 配備具有 RGMII & SGMII 的 TI DP82TG720S-Q1 1000BASE-T1 車用乙太網路 PHY，以及 MATEnet 連接器。TMDSCNCD263P 和 AM263Px MCU PLUS SDK 目前均支援 DP83TG720-EVM-AM2。

使用指南: PDF | HTML
TI.com 無法提供
開發板

LP-AM263P — AM263Px Arm® 架構 MCU 通用型 LaunchPad™ 開發套件

LP-AM263P 為 AM263Px 系列的 Sitara™ 高性能微控制器 (MCU) 的成本最佳化開發電路板。此電路板為初始評估與原型而設計，因為它提供標準化且使用方便的平台，可用於開發您的下一個應用程式。

LP-AM263P 配備了 Sitara AM263P4 處理器及其他零組件，可讓您使用各種裝置介面，其中包括工業乙太網路 (IE)、標準乙太網路、快速序列介面 (FSI) 及其他功能，來輕鬆建立原型。AM263P4 支援各種 IE 協定如 EtherCAT、EtherNet/IP 和 PROFINET®。

延伸 LaunchPad™ XL 開發套件提供額外的 I/O (...)

使用指南: PDF | HTML
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開發板

TMDSCNCD263P — AM263Px 通用 controlCARD™ 開發套件 Arm® 架構 MCU

TMDSCNCD263P 是適用於 AM263Px 系列 Sitara™ 高性能微控制器的 HSEC180 controlCARD 型評估和開發工具。此電路板極適用於初始評估與原型，因為它提供標準化且使用方便的平台，可用於開發您的下一個應用程式。AM263P 控制卡配備了 Sitara AM263P4 處理器與 PMIC 型電源解決方案及其他零組件，可讓使用者使用各種裝置介面，其中包括工業乙太網路、標準乙太網路、快速序列介面 (FSI) 及其他功能，以輕鬆開發和測試應用程式。AM263P4 支援 EtherCAT、EtherNet/IP 和 PROFINET 等各種工業乙太網路通訊協定。

(...)

使用指南: PDF | HTML
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開發板

TMDSHSECDOCK-AM263 — 適用於 GPMC、JTAG/TRACE、MCAN 和 LIN 訊號的 AM263x-CC HSEC 底座和斷路板。

此評估模組是用於 TMDSCNCD263 (AM263x controlCARD) 和 TMDSCNCD263P (AM263Px controlCARD) 的高速邊緣卡 (HSEC) 擴充塢，用於擴充關鍵 I/O 和硬體周邊設備。此電路板向處於評估和開發階段的客戶展示了 AM263x 和 AM263Px 上的 MCU+ SDK 的功能。除了 TMDSHSECDOCK 的功能外，此電路板還支援其他 AM263x 和 AM263Px 系列功能，例如 CAN/LIN、GPMC (僅限 AM263x)、TRACE 和 JTAG。TMDSHSECDOCK-AM263 包括一個板載 64Mb (...)
使用指南: PDF | HTML
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子卡

TMDSHSECDOCK — HSEC180 controlCARD 基板擴充站

TMDSHSECDOCK 為一塊基板，可為相容的 HSEC180 架構 controlCARD 提供關鍵訊號的接頭針腳存取。提供模擬板區域以快速進行原型設計。電路板電源可由 USB 纜線或 5-V 桶式電源供應器供電。

使用指南: PDF | HTML
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偵錯探測器

TMDSEMU110-U — XDS110 JTAG 偵錯探測器

德州儀器 XDS110 是一種全新的偵錯探測器 (模擬器) 類別，適用於 TI 嵌入式處理器。XDS110 取代 XDS100 系列，可在單一 Pod 中支援更廣泛的標準 (IEEE1149.1、IEEE1149.7、SWD)。同時，所有 XDS 偵錯探針在所有配備嵌入式追蹤緩衝器 (ETB) 的 Arm® 與 DSP 處理器中均支援核心與系統追蹤。  對於針腳上的核心追蹤，則需要 XDS560v2 PRO TRACE。

德州儀器 XDS110 透過 TI 20 針腳連接器（具有用於 TI 14 針腳和 Arm 10 針腳和 Arm 20 針腳的多轉接器）連接到目標電路板，並透過 USB2.0 (...)

使用指南: PDF
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偵錯探測器

TMDSEMU560V2STM-U — XDS560v2 System Trace USB 偵錯探測器

XDS560v2 是 XDS560™ 偵錯探測器系列的最高性能表現，支援傳統 JTAG 標準 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。請注意，序列線偵錯 (SWD) 不受支援。

所有 XDS 偵錯探測器均支援所有具有嵌入式追踪緩衝區 (ETB) 的 ARM 和 DSP 處理器中的核心和系統追蹤功能。對於針腳追蹤則需要 XDS560v2 PRO TRACE。

XDS560v2 透過 MIPI HSPT 60 針腳接頭 (具有用於 TI 14 針腳、TI 20 針腳和 ARM 20 針腳的多轉接器) 連接到目標電路板，並透過 USB2.0 高速 (480Mbps) (...)

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偵錯探測器

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB 與乙太網路偵錯探測器

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

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偵錯探測器

LB-3P-TRACE32-ARM — 適用於 Arm® 架構微控制器和處理器的 Lauterbach TRACE32® 偵錯和追蹤系統

Lauterbach 的 TRACE32® 工具是一套先進的軟硬體元件，可讓開發人員分析、最佳化及認證各種 Arm® 架構微控制器和處理器。全球知名的嵌入式系統和 SoC 偵錯和追蹤解決方案是完美的解決方案，適用於從早期的矽前 (pre-silicon) 開發，到產品認證和現場故障排除等所有開發階段。Lauterbach 工具的直覺模組化設計為工程師提供現今最高的可用性能，以及可隨需求變化而調整和成長的系統。藉由 TRACE32® 偵錯器，開發人員也可透過單一偵錯介面，同時偵錯和控制 SoC 中的任何 C28x/C29x/C6x/C7x DSP 核心及所有其他 Arm (...)

從：Lauterbach GmbH
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偵錯探測器

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

從：TASKING Germany GmbH
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軟體開發套件 (SDK)

AM263PX-MCAL-SDK — Microcontroller Abstraction Layer (MCAL) and Complex Device Drivers (CDD) for AM263PX

The AM263Px microcontroller (MCU) plus software development kit (SDK) is a unified software platform for embedded processors providing easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development schedules by eliminating (...)

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要求
軟體開發套件 (SDK)

AM263PX-RESTRICTED-SECURITY — AM263Px restricted security content

The AM263Px microcontroller (MCU) plus software development kit (SDK) is a unified software platform for embedded processors providing easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development schedules by eliminating (...)

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軟體開發套件 (SDK)

MCU-PLUS-SDK-AM263PX — MCU+ SDK for AM263Px - RTOS, No-RTOS

The AM263Px microcontroller (MCU) plus software development kit (SDK) is a unified software platform for embedded processors providing easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development schedules by eliminating (...)

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應用軟體及架構

AM263PX-RESTRICTED-SAFETY — AM263Px restricted functional safety content

The AM263Px microcontroller (MCU) plus software development kit (SDK) is a unified software platform for embedded processors providing easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development schedules by eliminating (...)

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快速入門

TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
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開始使用
IDE、配置、編譯器或偵錯程式

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

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IDE、配置、編譯器或偵錯程式

SYSCONFIG — Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

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線上培訓

AM26X-ACADEMY — AM26x Academy

AM26x Academy features easy-to-use training modules ranging from the basics of getting started to advanced development topics.
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軟體程式設計工具

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

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支援軟體

MATHW-3P-AM26X-EC — 德州儀器 AM26x MCU 嵌入式編碼器支援封裝

TI 為各種 AM26x 裝置和評估電路板提供基於模型設計的工作流程。

適用於 AM26x controlCARD 和 LaunchPad 電路板的 Embedded Coder® 支援套件可讓您使用 Simulink® 模型，在 AM26x 裝置上自動创建、載入及运行演算法。  模型在 Simulink 中設計，使用 Embedded Coder 產生程式碼，並在專為即時控制應用設計的 AM263x、AM263Px、AM261x 硬體平台上運行可執行文件，無需使用手動編程。運用業界實證的基於模型設計技術，驗證演算法在模擬期間是否能正常運作，然後使用自動產生程式碼，在 AM26X (...)
從：MathWorks, Inc.
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模擬型號

AM263Px BSDL Model

SPRM835.ZIP (9 KB) - BSDL Model
下載
模擬型號

AM263Px IBIS Model

SPRM834.ZIP (4124 KB) - IBIS Model
下載
模擬型號

AM263Px Thermal Model

SPRM833.ZIP (6 KB) - Thermal Model
下載
計算工具

AM263PX-PWR-EST-CALC — AM263Px power-estimation tool

The power estimation spreadsheet provides power consumption estimates based on measured and simulated data; they are provided “as is” and are not ensured within a specified precision.
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參考設計

TIDA-020079 — 區域參考設計

此參考設計展示了新一代區域控制模組的主要功能，包括電源分配、負載致動和車內網路。此設計著重於功能安全相容 PMIC 與微控制器 (MCU) 設計，具備理想二極體控制器的備援電源供應管理，以及用於安全配電的智慧 eFuse。此設計也具備區域控制模組中常見的各種負載致動選項，例如高壓側驅動器、馬達驅動器、可配置驅動器和 D 類音訊放大器。區域參考設計展現了各種通訊協定，例如乙太網路、CAN 和 LIN，並支援乙太網路 AVB、10BASE-T1S 和 CAN FD Light 等車輛網路技術的新興趨勢。
Design guide: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
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