MSPM0G3519-Q1
- Core
- Arm 32-bit Cortex M0+ CPU with memory protection unit, frequency up to 80MHz
-
Functional Safety-Compliant targeted
-
Developed for functional safety applications
- Documentation to aid ISO 26262 system design will be available
-
Systematic capability up to ASIL B targeted
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- PSA-L1 Certification targeted
- Operating characteristics
- Extended temperature: –40°C up to 125°C
- Wide supply voltage range: 1.62V to 3.6V
- Memories
- Up to 512KB of flash memory with error correction code (ECC)
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Dual-bank with address swap for OTA updates
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- 16KB data flash bank with ECC protection
- 128KB total SRAM
- SRAM (Bank 0): 64kB SRAM with ECC protection or hardware parity, and retention down to STANDBY mode
- SRAM (Bank 1): 64kB SRAM with retention down to STOP mode
- Up to 512KB of flash memory with error correction code (ECC)
- High-performance analog peripherals
- Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
- 14-bit effective resolution at 250ksps with hardware averaging
- Three high-speed comparators (COMP) with integrated 8-bit reference DACs
- 32ns propagation delay in high-speed mode
- Support low-power mode operation down to <1µA
- One 12-bit 1Msps digital-to-analog converter (DAC) with integrated output buffer
- Programmable analog connections between ADC, COMP and DAC
- Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
- Integrated temperature sensor
- Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
- Optimized low-power modes
- RUN: 123µA/MHz (CoreMark)
- SLEEP: 38µA/MHz
- STOP: 223µA at 4MHz
- STANDBY: 1.7µA at 32kHz with RTC and SRAM Bank 0 and state retention
- SHUTDOWN: 92nA with IO wake-up capability
- Intelligent digital peripherals
- 12-channel DMA controller
- Math accelerator supports DIV, SQRT, MAC and TRIG computations
- Nine timers support up to 28 PWM channels
- Two 16-bit general-purpose timers support QEI
- Four 16-bit general-purpose timers support low-power operation in STANDBY mode
- One 32-bit general-purpose timer
- Two 16-bit advanced timers with deadband support and complimentary outputs up to 12 PWM channels
- Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
- RTC with alarm and calendar mode
- Enhanced communication interfaces
- Seven UART interfaces
- Two supporting LIN, IrDA, DALI, Smart Card, Manchester
- Three supporting low-power operation in STANDBY mode
- Three I2C interfaces supporting up to FM+ (1Mbit/s), SMBus/PMBus, and wakeup from STOP mode
- Three SPI interfaces, with one supporting up to 32Mbits/s
- Two Controller Area Network (CAN) interfaces support CAN 2.0 A or B and CAN-FD
- Seven UART interfaces
- Clock system
- Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
- Phase-locked loop (PLL) up to 80MHz
- Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
- External 4 to 48MHz crystal oscillator (HFXT)
- External 32kHz crystal oscillator (LFXT)
- External clock input
- Data integrity and encryption
- AES-128/256 accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
- Secure key storage for up to four AES keys
- Flexible firewalls for protecting code and data
- True random number generator (TRNG)
- Cyclic redundancy checker (CRC-16, CRC-32)
- Flexible I/O features
- Up to 94 GPIOs
- Two 5V-tolerant open-drain IOs
- Three high-drive IOs with 20mA drive strength
- Four high-speed IOs
- Up to 94 GPIOs
- Development support
- 2-pin serial wire debug (SWD)
- Package options
- 100-pin LQFP (PZ) (0.5mm pitch)
- 80-pin LQFP (PN) (0.5mm pitch)
- 64-pin LQFP (PM) (0.5mm pitch)
- 48-pin LQFP (PT) (0.5mm pitch)
- 48-pin VQFN (RGZ) (0.5mm pitch, wettable flank)
- 32-pin VQFN (RHB) (0.5mm pitch, wettable flank)
- Family members (also see Device Comparison)
- MSPM0G3518-Q1: 256KB flash, 128KB RAM
- MSPM0G3519-Q1: 512KB flash, 128KB RAM
- Development kits and software (also see Tools and Software)
- Automotive qualification
- AEC-Q100 Grade 1 (-40°C to 125°C)
- Wettable flank for 32-pin and 48-pin VQFN options
MSPM0G351x-Q1 microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 256KB to 512KB of flash memory in small packages or high pin count packages (up to 100 pins). These devices include dual CAN-FD controllers, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.
The device has up to 512KB of embedded flash program memory with built-in error correction code (ECC) and up to 128KB SRAM (with ECC and parity protection for the first 64kB). The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.
Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes, as well as a TRNG entropy source. The cybersecurity architecture is pending Arm® PSA Level 1 certification.
A set of high performance analog modules is provided, such as two simultaneously sampling 12-bit, 4Msps ADCs supporting up to 27 external channels, on-chip voltage reference (1.4V or 2.5V), one 12-bit 1Msps DAC, and three comparators operable in low-power and high-speed modes with additional built-in 8-bit reference DACs .
The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration allowing for customers find the MCU that meets their projects needs. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.
MSPM0G351x-Q1 MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.
For complete module descriptions, see the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.
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設計與開發
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LP-MSPM0G3519 — LP-MSPM0G3519 評估模組
LP-MSPM0G3519 LaunchPad™ 開發套件是基於 MSPM0G3519 的易用型評估模組 (EVM)。其包含開始在 MSPM0G3519 M0+ MCU 平台上開發所需的一切,包括用於編程、偵錯和能源量測的板載偵錯探測器。電路板包含三個按鈕、兩個 LED (一個是 RGB LED) 和超過 80 個針腳。運用最佳配置的 ADC 和 DAC 低通濾波器預留位置,以及 Launchpad 背面提供的外部參考選項,改善類比結果。
TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger
TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)
ACROVIEW-3P-AP6000 — AP6000 programmer support all TI programmable chips, including EP Product, Power ICs, and Gauge ICs
AP6000, launched by Acroview, is a universal programmer designed to support TI ICs across all series. Leveraging Acroview's highly skilled algorithm R&D engineering team, it delivers the fastest chip support speed in the industry.The AP6000 is capable of programming 8 chips simultaneously, and (...)
ACROVIEW-3P-AP8000 — AP8000 Universal Programming System, including all TI programmable chips.
AP8000 is a leading technology platform of Universal Programming developed by Acroview. We have an accomplished team of algorithm R&D engineers, to offer the fastest chip support software development service among the industry. The AP8000 can support the programming of 8 chips simultaneously. (...)
C-GANG — 適用於獨立式與整合式快閃且快速可靠的 gang 編程解決方案
C-GANG 是一款低成本的 gang 程式設計工具,可同時編程多達六個相同的目標。本產品相容於各種 TI 微控制器,包括 MSPM0、MSP430 及 C2000 裝置。
MSPM0-SDK — MSPM0 Software Development Kit (SDK)
MSPM0 SDK 提供軟體、工具和文件的終極集合,可使用單一軟體套件,加速開發 MSPM0 MCU 平台的應用。
CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)
CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)
CCSTUDIO-OPENOCD — OpenOCD Binary Releases
EDGE-AI-STUDIO-MCU — Edge AI Studio for Microcontrollers
Edge AI Studio 是一系列圖形和命令行工具,旨在加速 TI 處理器、微控制器和雷達感測器上的邊緣 AI 開發。不管是使用來自 TI Model Zoo 的模型,還是
運用您自己的模型來開發概念驗證,Edge AI Studio 都能提供您所需的工具。
Edge AI Studio 圖形使用者介面提供完全整合的解決方案,用於收集和註釋資料、訓練和編譯模型,以在即時開發平台上部署。從 TI Model Zoo 中的各種預先訓練的模型中選擇,並可選擇透過自訂資料重新訓練,以提升準確度和性能。Edge AI Studio (...)
MSP-ZERO-CODE-STUDIO — Graphical development environment for designing applications for MSP microcontrollers
MSP Zero Code Studio 是一款可簡化韌體開發的視覺設計環境,並且能在數分鐘內設定、開發及執行微控制器應用程式,無須編碼,也不需要 IDE。提供獨立下載或雲端版本。
SYSCONFIG — Standalone desktop version of SysConfig
CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.
SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)
MSPM0-ACADEMY — MSPM0™ academy
CCSTUDIO-STARTHUB — Example application browser
MSP-MOTOR-CONTROL — MSPM0 Firmware solutions for motor control applications
MSP 馬達控制為一系列軟體、工具和範例,可在 30 分鐘或更短時間內運用 MSPM0 Arm® Cortex® M0+ MCU 和熱門馬達驅動器解決方案來運轉馬達。
MSP 馬達控制提供可轉動有刷、步進與三相馬達的受支援硬體套件範例,具備最佳性能、整合性與易用性的感測和無感測器控制演算法。透過訂購硬體、連接馬達及使用我們的圖形使用者介面或線上程式碼範例,可隨時運轉您的馬達。
TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud
ISOFT-3P-AUTOSAR — iSOFT 汽車基礎設施軟體產品
iSOFT 為 OEM 和零件供應商提供基於 MSPM0 的完整經典平台 AUTOSAR 解決方案。其可以提供自訂軟體並支援基於 MSPM0 的遷移。
- 完整的 AUTOSAR 開發工具鏈,涵蓋 SWC 設計、BSW 配置和 RTE 整合。
- 廣泛的合規性和支援:符合 AUTOSAR CP 3.1.5、4.2.2、R19-11 要求,通過 ISO 26262 ASIL D 和 ISO/SAE 21434。
- 技術服務:提供現場軟體整合成支援和售後技術支援。
如需進一步瞭解,請瀏覽:https://www.i-soft.com.cn/product
STK-3P-STK1000 — 使用 MSPM0G35xx 與 STK-3P-STK1000 套件的應用範例
基於 TI MSPM0G3519 高性能 MCU 及 DRV8316 馬達驅動器的 STK-3P-STK1000 應用解決方案專為汽車應用設計,整合了輕量可靠的 CAN/LIN 通訊協定堆疊,能以最低的資源消耗實現高效的車載網路通訊。該軟體還包含基於磁場定向控制 (FOC) 的馬達驅動演算法,可提供高效率、低雜訊的精密馬達控制。平台具有 A/B 分區韌體管理功能,支援安全的無線更新(OTA)及冗餘備份。
MSP-SAFETY-LIB — API Library for select Safety Mechanisms for MSP Families
MSPM0-DIAGNOSTIC-LIB — MSPM0 diagnostic library
MSPM0 診斷資料庫軟體開發套件 (SDK) 是一系列功能安全軟體,可協助客戶滿足功能安全診斷需求。
MSPM0-DIAGNOSTIC-LIB — MSPM0 diagnostic library
MSPM0 診斷資料庫軟體開發套件 (SDK) 是一系列功能安全軟體,可協助客戶滿足功能安全診斷需求。
MSPM0G351X-Q1-FS — MSPM0G351x functional safety information
LP-MSPM0G3507-OOBE — Out-of-box experience GUI for LP-MSPM0G3507
MSPM0-ANALOG-CONFIGURATOR — Analog Configurator for MSPM0
MSPM0 類比配置器是一款圖形配置工具,旨在使用 MSPM0 裝置簡化和加速類比訊號鏈的設計和實現,無需進行傳統的程式碼開發。
此工具使用直覺式 GUI,透過 MSPM0 裝置的高類比整合配置訊號鏈,即時分析和繪製訊號,並產生快閃裝置所需的配置和程式碼。
MSP-GANG-SOFTWARE — MSP-GANG Software
UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors
UniFlash 是 TI 龐大 CCStudio™ 開發生態系統的一部分,是一款用於在 TI 微控制器與無線連線裝置上對晶片內快閃記憶體進行燒錄,以及在 TI 處理器上對板載快閃記憶體進行燒錄的軟體工具。UniFlash 提供圖形化介面與命令行介面,並可在桌面上或雲端中執行。
UniFlash 可從 CCStudio™ 開發人員區上的雲端執行,或在下載後於 Windows®、Linux® 和 macOS® 電腦中使用。
請注意,mmWave、AMx、K2G 和 J7 裝置不支援 macOS。AMx、K2G 和 J7 裝置僅於命令列上支援。
MSPM0-CALC — Power estimation tool for the MSPM0 platform
TIDA-020093 — 適用於汽車前端雷達的單晶片 mmWave 串流雷達參考設計
隨著自動駕駛功能越來越多,汽車產業將轉向雷達價值和性能最佳化。透過原始雷達資料串流拓撲,可提高雷達性能和成本。此參考設計採用 AWR2188 雷達前端,搭配 8TX 和 8RX 天線元件,可實現高角解析度。此設計結合 DS90UB971S-Q1 FPD-Link™ 串聯器,將原始資料傳輸至中央處理單元及 MSPM0G3519-Q1 控制器,即可實現串流雷達應用。系統整合了廣泛輸入電壓前置穩壓器和雷達電源管理積體電路 (PMIC),可提供雷達性能所需的超低雜訊電源。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| LQFP (PM) | 64 | Ultra Librarian |
| LQFP (PN) | 80 | Ultra Librarian |
| VQFN (RGZ) | 48 | Ultra Librarian |
| LQFP (PT) | 48 | Ultra Librarian |
| VQFN (RHB) | 32 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。