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数据转换器
数模转换器 (DAC)
高速 DAC (> 10MSPS)

DAC5681

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16 位、1.0GSPS 数模转换器 (DAC)

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数据表

DAC5681

正在供货
数据表 立即订购

产品详情

Resolution (Bits) 16 Number of DAC channels 1 Interface type Parallel LVDS Sample/update rate (Msps) 1000 Features Ultra High Speed Rating Catalog Interpolation 1x Power consumption (typ) (mW) 650 SFDR (dB) 81 Architecture Current Sink Operating temperature range (°C) -40 to 85 Reference type Int
Resolution (Bits) 16 Number of DAC channels 1 Interface type Parallel LVDS Sample/update rate (Msps) 1000 Features Ultra High Speed Rating Catalog Interpolation 1x Power consumption (typ) (mW) 650 SFDR (dB) 81 Architecture Current Sink Operating temperature range (°C) -40 to 85 Reference type Int
VQFN (RGC) 64 81 mm² 9 x 9
  • 16-Bit Digital-to-Analog Converter (DAC)
  • 1.0 GSPS Update Rate
  • 16-Bit Wideband Input LVDS Data Bus
    • 8 Sample Input FIFO
    • On-Chip Delay Lock Loop
  • High Performance
    • 73 dBc ACLR WCDMA TM1 at 180 MHz
  • On Chip 1.2 V Reference
  • Differential Scalable Output: 2 to 20 mA
  • Package: 64-Pin 9 × 9 mm QFN
  • 16-Bit Digital-to-Analog Converter (DAC)
  • 1.0 GSPS Update Rate
  • 16-Bit Wideband Input LVDS Data Bus
    • 8 Sample Input FIFO
    • On-Chip Delay Lock Loop
  • High Performance
    • 73 dBc ACLR WCDMA TM1 at 180 MHz
  • On Chip 1.2 V Reference
  • Differential Scalable Output: 2 to 20 mA
  • Package: 64-Pin 9 × 9 mm QFN

The DAC5681 is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input and internal voltage reference. The DAC5681 offers superior linearity and noise performance.

The DAC5681 integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC and lower EMI than traditional CMOS data interfaces. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

The current-steering architecture of the DAC5681 consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5681 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. The device is pin upgradeable to the other members of the family: the DAC5681Z and DAC5682Z. The single-channel DAC5681Z and dual-channel DAC5682Z both provide optional 2x/4x interpolation and a clock multiplying PLL.

The DAC5681 is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input and internal voltage reference. The DAC5681 offers superior linearity and noise performance.

The DAC5681 integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC and lower EMI than traditional CMOS data interfaces. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

The current-steering architecture of the DAC5681 consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5681 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. The device is pin upgradeable to the other members of the family: the DAC5681Z and DAC5682Z. The single-channel DAC5681Z and dual-channel DAC5682Z both provide optional 2x/4x interpolation and a clock multiplying PLL.
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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 16-bit 1.0 GSPS Digital-To-Analog Converter (DAC) . 数据表 (Rev. C) 2012年 8月 6日
模拟设计期刊 Q3 2009 Issue Analog Applications Journal 2018年 9月 24日
应用手册 High Speed, Digital-to-Analog Converters Basics (Rev. A) 2012年 10月 23日
用户指南 TSW1400 Pattern Generators 2012年 5月 3日
模拟设计期刊 Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs 2009年 7月 14日
应用手册 Passive Terminations for Current Output DACs 2008年 11月 10日
应用手册 所选封装材料的热学和电学性质 2008年 10月 16日
应用手册 高速数据转换 英语版 2008年 10月 16日
应用手册 CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 2008年 6月 8日
应用手册 Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2008年 6月 2日

订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

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