LMX2571-EP
- VID#: V62/21613-01XE
- -55 °C to +125 °C Operating Temperature
- Any Frequency From 10 MHz to 1344 MHz
- Low Phase Noise and Spurs
- –123 dBc/Hz at 12.5-kHz Offset at 480 MHz
- –145 dBc/Hz at 1-MHz Offset at 480 MHz
- Normalized PLL Noise Floor of –231 dBc/Hz
- Spurious Better Than –75 dBc/Hz
- New FastLock to Reduce Lock Time
- A Novel Technique to Remove Integer Boundary Spurs
- Integrated 5-V Charge Pump and Output Divider for External VCO Operation
- 2-, 4-, and 8-Level or Arbitrary Level Direct Digital FSK Modulation
- One TX/RX Output or Two Fanout Outputs
- Low Current Consumption
- 39-mA Typical Synthesizer Mode (Internal VCO)
- 9-mA Typical PLL Mode (External VCO)
- 24-Bit Fractional-N Delta Sigma Modulator
- Functional Differences between LMX2571 vs LMX2571-EP
- LMX2571-EP has no TrCtl Pin
- LMX2571-EP has no OSCin* pin, Differential Mode, or Crystal Mode
The LMX2571-EP device is a low-power, high-performance, wideband PLLatinum™ RF synthesizer that integrates a delta-sigma fractional N PLL, multiple core voltage-controlled oscillator (VCO), programmable output dividers and two output buffers. The VCO cores work up to 5.376 GHz resulting in continuous output frequency range of 10 MHz to 1344 MHz.
This synthesizer can also be used with an external VCO. To that end, a dedicated 5-V charge pump and an output divider are available for this configuration.
A unique programmable multiplier is also incorporated to help improve spurs, allowing the system to use every channel even if it falls on an integer boundary.
The output has an integrated SPDT switch that can be used as a transmit and receive switch in FDD radio application. Both outputs can also be turned on to provide 2 outputs at the same time.
The LMX2571-EP supports direct digital FSK modulation through programming or pins. Discrete level FSK, pulse shaping FSK, and analog FM modulation are supported.
A new FastLock technique can be used allowing the user to step from one frequency to the next in less than 1.5 ms even when an external VCO is used with a narrow band loop filter.
您可能會感興趣的類似產品
針腳對針腳的功能與所比較的裝置相同。
功能相似於所比較的產品。
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LMX2571-EP Low-Power, High-Performance PLLatinum RF Synthesizer With FSK Modulation datasheet (Rev. B) | PDF | HTML | 2022/6/1 | ||
| 應用說明 | Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) | PDF | HTML | 2025/4/11 | |||
| Application brief | Compilation of RF Synthesizer Resources | PDF | HTML | 2024/10/22 | |||
| 技術文章 | How to implement FM modulation | PDF | HTML | 2017/8/3 | |||
| 應用說明 | Frequency Shift Keying with LMX2571 | 2017/5/30 | ||||
| 應用說明 | LMX2571 Using a Programmable Input Multiplier to Minimize Integer Boundary Spurs | PDF | HTML | 2016/1/12 | |||
| 技術文章 | Timing is Everything: Improving integer boundary spurs in fractional PLL synthesiz | PDF | HTML | 2015/8/5 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
德州儀器 (TI) 的時鐘及合成器 (TICS) 專業級軟體用於編程具有以下前置字元的產品編號的評估模組 (EVM)：CDC、LMK 和 LMX。這些產品包括鎖相迴路及電壓控制振盪器 (PLL+VCO)、合成器和時鐘裝置。
CLOCK-TREE-ARCHITECT — 時鐘樹架構程式設計軟體
時鐘樹架構是一款時鐘樹合成工具，可根據您的系統需求產生時鐘樹解決方案，進而簡化您的設計流程。此工具可從廣泛的計時產品資料庫中汲取資料，產生系統級多晶片計時解決方案。
PLLATINUMSIM-SW — PLL 迴路濾波器、相位雜訊、鎖定時間與雜散模擬工具
PLLATINUMSIM-SW 為一模擬工具，可讓使用者建立 PLLatinum™ 積體電路的詳細設計和模擬，包括 LMX 系列的相位鎖定迴路 (PLL) 及合成器。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RHH) | 36 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。