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時鐘緩衝器

LMK01000

現行

具 3 個 LVDS 和 5 個 LVPECL 輸出的 1.6-GHz 高性能時脈緩衝器、分頻器和分配器

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產品規格表

LMK01000

現行
產品規格表 立即訂購

產品詳細資料

Number of outputs 8 Additive RMS jitter (typ) (fs) 30 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Output skew (ps) 30 Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVDS, LVPECL Input type LVDS
Number of outputs 8 Additive RMS jitter (typ) (fs) 30 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Output skew (ps) 30 Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVDS, LVPECL Input type LVDS
WQFN (RHS) 48 49 mm² 7 x 7

  • 30 fs additive jitter (100 Hz to 20 MHz)
  • Dual clock inputs
  • Programmable output channels (0 to 1600 MHz)
  • External synchronization
  • Pin compatible family of clocking devices
  • 3.15 to 3.45 V operation
  • Package: 48 pin LLP (7.0 x 7.0 x 0.8 mm)

    • Device LVDS Outputs LVPECL Outputs
    LMK01000 3 5
    LMK01010 8 0
    LMK01020 0 8

  • 30 fs additive jitter (100 Hz to 20 MHz)
  • Dual clock inputs
  • Programmable output channels (0 to 1600 MHz)
  • External synchronization
  • Pin compatible family of clocking devices
  • 3.15 to 3.45 V operation
  • Package: 48 pin LLP (7.0 x 7.0 x 0.8 mm)

    • Device LVDS Outputs LVPECL Outputs
    LMK01000 3 5
    LMK01010 8 0
    LMK01020 0 8

    The LMK01000 family provides an easy way to divide and distribute high performance clock signals throughout the system. These devices provide best-in-class noise performance and are designed to be pin-to-pin and footprint compatible with LMK03000/LMK02000 family of precision clock conditioners.

    The LMK01000 family features two programmable clock inputs (CLKin0 and CLKin1) that allow the user to dynamically switch between different clock domains.

    Each device features 8 clock outputs with independently programmable dividers and delay adjustments. The outputs of the device can be easily synchronized by an external pin (SYNC*).

    Target Applications

  • High performance Clock Distribution
  • Wireless Infrastructure
  • Medical Imaging
  • Wired Communications
  • Test and Measurement
  • Military / Aerospace

    •

    The LMK01000 family provides an easy way to divide and distribute high performance clock signals throughout the system. These devices provide best-in-class noise performance and are designed to be pin-to-pin and footprint compatible with LMK03000/LMK02000 family of precision clock conditioners.

    The LMK01000 family features two programmable clock inputs (CLKin0 and CLKin1) that allow the user to dynamically switch between different clock domains.

    Each device features 8 clock outputs with independently programmable dividers and delay adjustments. The outputs of the device can be easily synchronized by an external pin (SYNC*).

    Target Applications

  • High performance Clock Distribution
  • Wireless Infrastructure
  • Medical Imaging
  • Wired Communications
  • Test and Measurement
  • Military / Aerospace

    •
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    技術文件

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    重要文件 類型 標題 格式選項 日期
    * Data sheet Fam LMK01000 Fam 1.6GHz HPer Clk Buffer, Divider and Distributor datasheet (Rev. G) 2009年 10月 15日
    Application note AN-1821 CPRI Repeater System (Rev. A) 2013年 4月 26日
    Application note Phase Synchronization with Multiple Devices and Frequencies (Rev. A) 2013年 4月 26日
    Design guide Clock Conditioner Owner's Manual 2006年 11月 10日

    設計與開發

    如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

    開發板

    LMK01000EVAL — 1.6 GHz 低雜訊時鐘緩衝器、除法器和分配器

    The LMK01000 Evaluation Kit simplifies evaluation of the LMK01000 1.6 GHz High Performance Clock Buffer, Divider, and Distributor. The package consists of an Evaluation Board, Evaluation Board Instructions, and a cable for programming the device through a PC parallel port. CodeLoader 4 is the (...)

    使用指南: PDF
    TI.com 無法提供
    軟體程式設計工具

    CODELOADER — CodeLoader Device Register Programming v4.19.0

    The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.

    Which software do I use?

    Product

    (...)

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    支援軟體

    CLOCKDESIGNTOOL — Clock Design Tool Software

    The Clock Design Tool software helps with part selection, loop filter design and simulation of timing device solutions. When you enter desired output frequencies and a reference frequency (optional), the tool provides TI devices to meet the specified requirements, divider values and a recommended (...)

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    TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices

    Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

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    模擬型號

    LMK01000 IBIS Model (Rev. A)

    SNAM019A.ZIP (31 KB) - IBIS Model
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    設計工具

    CLOCK-TREE-ARCHITECT — 時鐘樹架構程式設計軟體

    時鐘樹架構是一款時鐘樹合成工具，可根據您的系統需求產生時鐘樹解決方案，進而簡化您的設計流程。此工具可從廣泛的計時產品資料庫中汲取資料，產生系統級多晶片計時解決方案。
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    PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

    PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

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    封裝 針腳 CAD 符號、佔位空間與 3D 模型
    WQFN (RHS) 48 Ultra Librarian
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    內含資訊：
    • RoHS
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    • 產品標記
    • 鉛塗層/球物料
    • MSL 等級/回焊峰值
    • MTBF/FIT 估算值
    • 材料內容
    • 認證摘要
    • 進行中的可靠性監測
    內含資訊：
    • 晶圓廠位置
    • 組裝地點

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