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LMX2581

現行

具整合式 VCO 的 3.76GHz 寬頻頻率合成器

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產品規格表

LMX2581

現行
產品規格表 立即訂購

產品詳細資料

Frequency (max) (MHz) 3760 Frequency (min) (MHz) 50 Normalized PLL phase noise (dBc/Hz) -229 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -125 Features Integrated VCO, Wideband Current consumption (mA) 178 Integrated VCO Yes Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) 10
Frequency (max) (MHz) 3760 Frequency (min) (MHz) 50 Normalized PLL phase noise (dBc/Hz) -229 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -125 Features Integrated VCO, Wideband Current consumption (mA) 178 Integrated VCO Yes Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) 10
WQFN (RTV) 32 25 mm² 5 x 5
  • Output Frequency from 50 to 3760 MHz
  • Input Clock Frequency up to 900 MHz
  • Phase Detector Frequency up to 200 MHz
  • Supports Fractional and Integer Modes
  • –229 dBc/Hz Normalized PLL Phase Noise
  • –120.8 dBc/Hz Normalized PLL 1/f Noise
  • –137 dBc/Hz VCO Phase Noise @ 1 MHz
    offset for a 2.5 GHz Carrier
  • 100 fs RMS Jitter in Integer Mode
  • Programmable Fractional Modulator Order
  • Programmable Fractional Denominator
  • Programmable Output Power up to +12 dBm
  • Programmable 32 Level Charge Pump Current
  • Programmable Option to Use an External VCO
  • Digital Lock Detect
  • 3-Wire Serial Interface and Readback
  • Single Supply Voltage from 3.15 V to 3.45 V
  • Supports Logic Levels down to 1.6 V
  • Output Frequency from 50 to 3760 MHz
  • Input Clock Frequency up to 900 MHz
  • Phase Detector Frequency up to 200 MHz
  • Supports Fractional and Integer Modes
  • –229 dBc/Hz Normalized PLL Phase Noise
  • –120.8 dBc/Hz Normalized PLL 1/f Noise
  • –137 dBc/Hz VCO Phase Noise @ 1 MHz
    offset for a 2.5 GHz Carrier
  • 100 fs RMS Jitter in Integer Mode
  • Programmable Fractional Modulator Order
  • Programmable Fractional Denominator
  • Programmable Output Power up to +12 dBm
  • Programmable 32 Level Charge Pump Current
  • Programmable Option to Use an External VCO
  • Digital Lock Detect
  • 3-Wire Serial Interface and Readback
  • Single Supply Voltage from 3.15 V to 3.45 V
  • Supports Logic Levels down to 1.6 V

The LMX2581 is a low noise wideband frequency synthesizer that integrates a delta-sigma fractional N PLL, multiple core VCO, programmable output divider, and two differential output buffers. The VCO frequency range is from 1880 to 3760 MHz and can be sent directly to the output buffers or divided down by even values from 2 to 38. Each buffer is capable of output power from –3 to +12 dBm at 2700 MHz. Integrated low noise LDOs are used for superior noise immunity and consistent performance.

This synthesizer is a highly programmable device and it enables the user to optimize its performance. In fractional mode, the denominator and the modulator order are programmable and can be configured with dithering as well. The user also has the ability to directly specify a VCO core or entirely bypass the internal VCO. Finally, many convenient features are included such as power down, Fastlock, auto mute, and lock detection. All registers can be programmed through a simple 3 wire interface and a read back feature is also available.

The LMX2581 operates on a single 3.3 V supply and comes in a 32 pin 5.0 mm × 5.0 mm WQFN package.

The LMX2581 is a low noise wideband frequency synthesizer that integrates a delta-sigma fractional N PLL, multiple core VCO, programmable output divider, and two differential output buffers. The VCO frequency range is from 1880 to 3760 MHz and can be sent directly to the output buffers or divided down by even values from 2 to 38. Each buffer is capable of output power from –3 to +12 dBm at 2700 MHz. Integrated low noise LDOs are used for superior noise immunity and consistent performance.

This synthesizer is a highly programmable device and it enables the user to optimize its performance. In fractional mode, the denominator and the modulator order are programmable and can be configured with dithering as well. The user also has the ability to directly specify a VCO core or entirely bypass the internal VCO. Finally, many convenient features are included such as power down, Fastlock, auto mute, and lock detection. All registers can be programmed through a simple 3 wire interface and a read back feature is also available.

The LMX2581 operates on a single 3.3 V supply and comes in a 32 pin 5.0 mm × 5.0 mm WQFN package.
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* Data sheet LMX2581 Wideband Frequency Synthesizer with Integrated VCO datasheet (Rev. G) PDF | HTML 2014年 9月 5日

設計與開發

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開發板

LMX2581EVM — LMX2581 評估模組

LMX2581 寬頻頻率合成器可產生各種頻率，且相位雜訊極低。LMX2581 參考電路板 (LMX2581EVM) 旨在輔助評估系統中的 LMX2581，同時當做客戶系統的參考設計。除參考電路板套件外，只需一台 PC 和相位雜訊分析器即可使用。此評估板可透過為配套使用而開發的 CodeLoader 進行評估和控制。CodeLoader 軟體能透過該裝置進行全面控制，同時還能由 Active X 透過程式 (如 Excel 和 Labview) 進行呼叫。此板的功能旨在獲得最大的靈活性和便利性。預設配置 XO (...)

使用指南: PDF
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軟體程式設計工具

CODELOADER — CodeLoader Device Register Programming v4.19.0

The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.

Which software do I use?

Product

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CLOCKDESIGNTOOL — Clock Design Tool Software

The Clock Design Tool software helps with part selection, loop filter design and simulation of timing device solutions. When you enter desired output frequencies and a reference frequency (optional), the tool provides TI devices to meet the specified requirements, divider values and a recommended (...)

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TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices

Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

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模擬型號

LMX2581 IBIS Model

SNAM157.ZIP (54 KB) - IBIS Model
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設計工具

CLOCK-TREE-ARCHITECT — 時鐘樹架構程式設計軟體

時鐘樹架構是一款時鐘樹合成工具，可根據您的系統需求產生時鐘樹解決方案，進而簡化您的設計流程。此工具可從廣泛的計時產品資料庫中汲取資料，產生系統級多晶片計時解決方案。
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PLLATINUMSIM-SW — PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

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參考設計

TIDA-00360 — 具 16 位元 ADC 和 100 MHz IF 頻寬的 700–2700 MHz 雙通道接收器參考設計

The increasing demand on wireless networks to provide faster data links to customers has driven transceiver hardware to increasingly demanding performance with enough bandwidth to support the largest standardized multi-carrier frequency bands (with band aggregation in some cases) and enough (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00426 — 12 Gbps 多通道 BERT 板參考設計

此參考設計為 12Gbps 低成本位元錯誤測試器 (BERT)，可產生和檢查最多 8 通道的偽隨機二進位序列 (PRBS)。此設計經過驗證，是一種產生高達 12Gbps 的多通道高速序列位元流以及檢查傳入的序列位元是否存在可能的位元錯誤的便捷方法。  此設計可做為手持式 BERT 用於評估高速子系統的訊號完整性和位元錯誤性能。
Design guide: PDF
電路圖: PDF
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WQFN (RTV) 32 Ultra Librarian
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