LMKDB1120
- LP-HCSL clock buffer and clock MUX that support:
- PCIe Gen 1 to Gen 7
- CC (Common Clock) and IR (Independent Reference) PCIe architectures
- Input clock with or without SSC
- Intel DB2000QL and DB1206 compliant:
- All devices meet DB2000QL specifications
- LMKDB1120 is pin-compatible to DB2000QL
- LMKDB1112 is pin-compatible to DB1206
- Extremely low additive jitter:
- 31fs maximum 12kHz to 20MHz RMS additive jitter at 156.25MHz
- 13fs maximum additive jitter for PCIe Gen 4
- 5fs maximum additive jitter for PCIe Gen 5
- 3fs maximum additive jitter for PCIe Gen 6
- 2.1fs maximum additive jitter for PCIe Gen 7
- Fail-safe input
- Fail-safe outputs (LMKDB1120FS, LMKDB1108FS and LMKDB1104FS only)
- Flexible power-up sequence
- Automatic output disable
- Individual output enable
- SBI (Side Band Interface) for high-speed output enable or disable
- LOS (Loss of Signal) input detection
- 85Ω or 100Ω output impedance
- 1.8V / 3.3V ± 10% power supply
- –40°C to 105°C ambient temperature
The LMKDB devices are a family of extremely-low-jitter LP-HCSL buffers that support PCIe Gen 1 to Gen 7 and are DB2000QL compliant. The devices provide flexible power-up sequence, fail-safe inputs, fail-safe outputs, individual output active and inactive pins, loss of input signal (LOS) detection and automatic output disable features, as well as excellent power supply noise rejection performance.
Both 1.8V and 3.3V supply voltages are supported. For LMKDB1120, 1.8V power supply saves 250mW power compared to 3.3V.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LMKDB11xx PCIe Gen 1 to Gen 7 Ultra Low Jitter LP-HCSL Clock Buffer Family datasheet (Rev. G) | PDF | HTML | 2026/5/29 | ||
| Application brief | Mitigating FLEXIO Use Case Risks as Clock Pins Using LMKDB11xxFS Fail-safe Output Clock Buffers | PDF | HTML | 2025/9/26 | |||
| 應用說明 | LMKDB1xxx PCI Express Compliance Report (Rev. A) | PDF | HTML | 2025/4/22 | |||
| 使用指南 | RC19XXX, 9QXL2001X vs. LMKDB1XXX, CDCDB2000 Drop-In Replacement Guide. | PDF | HTML | 2024/7/18 | |||
| 應用說明 | Clocking for PCIe Applications | PDF | HTML | 2023/11/28 | |||
| 應用說明 | LMK6H and LMKDB1xxx PCI Express Compliance Report | PDF | HTML | 2023/11/21 | |||
| 白皮書 | The Importance of Clocks in Data Centers | PDF | HTML | 2023/11/21 | |||
| 證書 | LMKDB1120EVM EU Declaration of Conformity (DoC) | PDF | HTML | 2023/10/4 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
LMKDB1120EVM — 適用於 PCIe Gen 1 至 Gen 6 的 20 輸出時鐘緩衝器的 LMKDB1120 評估模組
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
德州儀器 (TI) 的時鐘及合成器 (TICS) 專業級軟體用於編程具有以下前置字元的產品編號的評估模組 (EVM)：CDC、LMK 和 LMX。這些產品包括鎖相迴路及電壓控制振盪器 (PLL+VCO)、合成器和時鐘裝置。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TLGA (NPP) | 80 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。