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射頻 (RF) 與微波
RF PLL 與合成器

LMX2592

現行

具整合式 VCO 的 9.8GHz 寬頻頻率合成器

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LMX2592

現行
產品規格表 立即訂購

產品詳細資料

Frequency (max) (MHz) 0.13, 9800 Frequency (min) (MHz) 20 Normalized PLL phase noise (dBc/Hz) -231 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -126 Features Integer-boundary spurs (IBS) removal, Integrated VCO, Phase adjustment, Wideband Current consumption (mA) 250 Integrated VCO Yes Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 0.13, 9800 Frequency (min) (MHz) 20 Normalized PLL phase noise (dBc/Hz) -231 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -126 Features Integer-boundary spurs (IBS) removal, Integrated VCO, Phase adjustment, Wideband Current consumption (mA) 250 Integrated VCO Yes Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) Loop BW dependent
VQFN (RHA) 40 36 mm² 6 x 6
  • Output Frequency Range from 20 to 9800 MHz
  • Industry Leading Phase Noise Performance
    • VCO Phase Noise: –134.5 dBc/Hz at 1-MHz Offset for 6-GHz Output
    • Normalized PLL Noise Floor: –231 dBc/Hz
    • Normalized PLL Flicker Noise: –126 dBc/Hz
    • 49-fs RMS Jitter (12 kHz to 20 MHz) for 6 GHz Output
  • Input Clock Frequency Up to 1400 MHz
  • Phase Detector Frequency Up to 200 MHz, and Up to 400 MHz in Integer-N Mode
  • Supports Fractional-N and Integer-N Modes
  • Dual Differential Outputs
  • Innovative Solution to Reduce Spurs
  • Programmable Phase Adjustment
  • Programmable Charge Pump Current
  • Programmable Output Power Level
  • SPI or uWire (4-Wire Serial Interface)
  • Single Power Supply Operation: 3.3 V
  • Output Frequency Range from 20 to 9800 MHz
  • Industry Leading Phase Noise Performance
    • VCO Phase Noise: –134.5 dBc/Hz at 1-MHz Offset for 6-GHz Output
    • Normalized PLL Noise Floor: –231 dBc/Hz
    • Normalized PLL Flicker Noise: –126 dBc/Hz
    • 49-fs RMS Jitter (12 kHz to 20 MHz) for 6 GHz Output
  • Input Clock Frequency Up to 1400 MHz
  • Phase Detector Frequency Up to 200 MHz, and Up to 400 MHz in Integer-N Mode
  • Supports Fractional-N and Integer-N Modes
  • Dual Differential Outputs
  • Innovative Solution to Reduce Spurs
  • Programmable Phase Adjustment
  • Programmable Charge Pump Current
  • Programmable Output Power Level
  • SPI or uWire (4-Wire Serial Interface)
  • Single Power Supply Operation: 3.3 V

The LMX25 92 device is a low-noise, wideband RF PLL with integrated VCO that supports a frequency range from 20 MHz to 9.8 GHz. The device supports both fractional-N and integer-N modes, with a 32-bit fractional divider allowing fine frequency selection. Integrated noise of 49 fs for 6-GHz output makes it an ideal low-noise source. Combining best-in-class PLL and integrated VCO noise with integrated LDOs, this device removes the need for multiple discrete devices in high performance systems.

The device accepts input frequencies up to 1.4 GHz, which combined with frequency dividers and programmable low noise multiplier allows flexible frequency planning. The additional programmable low-noise multiplier lets users mitigate the impact of integer boundary spurs. In Fractional-N mode, the device can adjust the output phase by a 32-bit resolution. For applications that need fast frequency changes, the device supports a fast calibration option which takes less than 25 µs.

This performance is achieved by using single 3.3-V supply. It supports 2 flexible differential outputs that can be configured as single-ended outputs as well. Users can choose to program one output from the VCO (or doubler) and the second from the channel divider. When not being used, each output can be muted separately.

The LMX25 92 device is a low-noise, wideband RF PLL with integrated VCO that supports a frequency range from 20 MHz to 9.8 GHz. The device supports both fractional-N and integer-N modes, with a 32-bit fractional divider allowing fine frequency selection. Integrated noise of 49 fs for 6-GHz output makes it an ideal low-noise source. Combining best-in-class PLL and integrated VCO noise with integrated LDOs, this device removes the need for multiple discrete devices in high performance systems.

The device accepts input frequencies up to 1.4 GHz, which combined with frequency dividers and programmable low noise multiplier allows flexible frequency planning. The additional programmable low-noise multiplier lets users mitigate the impact of integer boundary spurs. In Fractional-N mode, the device can adjust the output phase by a 32-bit resolution. For applications that need fast frequency changes, the device supports a fast calibration option which takes less than 25 µs.

This performance is achieved by using single 3.3-V supply. It supports 2 flexible differential outputs that can be configured as single-ended outputs as well. Users can choose to program one output from the VCO (or doubler) and the second from the channel divider. When not being used, each output can be muted separately.
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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet LMX2592 High Performance, Wideband PLLatinum™ RF Synthesizer With Integrated VCO datasheet (Rev. G) PDF | HTML 2022年 8月 3日
Application brief Compilation of RF Synthesizer Resources PDF | HTML 2024年 10月 22日
Application note Sine to Square Wave Conversion Using Clock Buffers PDF | HTML 2024年 9月 3日
Application note Clocking Optimization for RF Sampling Analog-to-Digital Converters (Rev. A) PDF | HTML 2021年 4月 7日
Technical article Don’t let bad reference signals destroy the phase noise in your PLL/synthesizer PDF | HTML 2017年 1月 10日
Technical article Why phase noise matters in RF sampling converters PDF | HTML 2016年 11月 28日
Technical article A survival guide to scaling your PLL loop filter design PDF | HTML 2016年 11月 22日
Technical article Issues with jitter, phase noise, lock time or spurs? Check the loop-filter bandwid PDF | HTML 2016年 6月 6日
Technical article How to complete your RF sampling solution PDF | HTML 2016年 5月 18日
Technical article How to estimate the phase noise of a PLL with basic datasheet specifications PDF | HTML 2016年 3月 2日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DAC12DL3200EVM — 適用於 12 位元、雙路 3.2 GSPS 或單路 6.4-GSPS、射頻取樣 DAC 的 DAC12DL3200 評估模組

DAC12DL3200 評估模組 (EVM) 是用於評估 DAC12DL3200 的平台，是一款超低延遲、雙通道、12 位元、射頻取樣數位轉類比轉換器 (DAC)，在雙通道模式下能以高達 3.2 GSPS 或單通道模式下 6.4 GSPS 的取樣率運作。

DAC12DL3200 在使用多個 Nyquist 輸出模式時，在載波頻率接近 8 GHz 時，可以傳輸超過 2 GHz 的訊號帶寬。DAC12DL3200EVM 裝置輸入資料會透過高速低電壓差動訊號 (LVDS) 介面傳送。

EVM 隨附之 LMX2592 時脈合成器和 LMK04828 JESD204B (...)

使用指南: PDF | HTML
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開發板

LMX2592EVM — LMX2592EVM 高效能寬頻頻率射頻合成器 PLLATINUM™ 積體電路

The LMX2592EVM evaluation module (EVM) is for the LMX2592 device. The LMX2592 device outputs very high frequency signals with industry-leading phase noise. The integrated voltage-controlled oscillator (VCO) allows minimal discrete external components to design. The printed circuit (...)

使用指南: PDF
TI.com 無法提供
開發板

XMICR-3P-LMX2592 — LMX2592 X-MWblock 評估模組

X-MWblocks consist of RF and Microwave “Drop-In” components that can be used individually for prototyping or in production assemblies. X-MWblocks are easy to test, integrate, align, and configure to 60 GHz and beyond. No messy Sweat Soldering or Silver Epoxy processes are required. X-MWblocks are (...)

從：X-Microwave
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支援軟體

TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices

Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

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模擬型號

LMX2582 IBIS Model (Rev. A)

SNAM199A.ZIP (44 KB) - IBIS Model
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設計工具

CLOCK-TREE-ARCHITECT — 時鐘樹架構程式設計軟體

時鐘樹架構是一款時鐘樹合成工具，可根據您的系統需求產生時鐘樹解決方案，進而簡化您的設計流程。此工具可從廣泛的計時產品資料庫中汲取資料，產生系統級多晶片計時解決方案。
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PLLATINUMSIM-SW — PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

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參考設計

TIDA-00885 — 由降壓轉換器供電的 9.8 GHz 射頻高效能合成器參考設計

TIDA-00885 參考設計採用 LMX2592 低雜訊寬頻 RF PLL，該晶片整合 VCO，可產生 20 MHz 至 9.8 GHz 的輸出頻率範圍。LMX2592 具備卓越性能，在 6GHz 輸出時整合相位雜訊僅 49fs，是理想的低雜訊源。LMX2592 頻率合成器有兩種供電方案可選：TPS62150 與 LM43601 降壓轉換器，均採用常用封裝規格。  LM43601 的接腳與 LM46000、LM46001、LM46002、LM43600、LM43602 及 LM43603 完全相容。TPS62150 DC-DC 穩壓器與 TPS6213x、TPS6214x (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00626 — 採用整合式合成器和突波抑制功能的 9.8 GHz 射頻 CW 訊號產生器參考設計

本設計為一款 9.8GHz 寬頻、低相位雜訊、整合式連續波 (CW) 射頻訊號產生器，具備多樣化的雜訊抑制技術。輸出功率可在 -32dBm 至 14.5dBm 間以 0.5dB 為單位進行編程設定。此訊號產生器可用作模擬或向量訊號產生器等應用的本地震盪器，也可作為射頻 ADC 的時鐘產生器。TIDA-00626 可透過 TI 的 USB2ANY 介面從任意電腦控制，也可使用微控制器 MSP430F5529 開發板進行控制。
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00814 — 射頻取樣 S 波段雷達接收器參考設計

使用 ADC32RF45、3Gsps、14 位元的類比轉數位轉換器 (ADC) 展示在 S 頻帶中運作的雷達系統的直接射頻取樣接收器方法。射頻取樣可透過消除向下轉換，並且使用高取樣率可實現更寬的訊號頻寬。這一方法透過根據 ASR-11 空中交通管制雷達規格建造接收器來示範。
Design guide: PDF
電路圖: PDF
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VQFN (RHA) 40 Ultra Librarian
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