LMK01801

現行

雙時脈分配

立即訂購

產品規格表

document-pdfAcrobat LMK01801 Dual Clock Divider Buffer datasheet (Rev. D) (英文) PDF | HTML

LMK01801

現行

立即訂購

產品詳細資料

Number of outputs

12

Additive RMS jitter (typ) (fs)

50

Core supply voltage (V)

3.3

Output supply voltage (V)

3.3

Output skew (ps)

3

Operating temperature range (°C)

-40 to 85

Rating

Catalog

Output type

LVCMOS, LVDS, LVPECL

Input type

LVDS

Number of outputs

12

Additive RMS jitter (typ) (fs)

50

Core supply voltage (V)

3.3

Output supply voltage (V)

3.3

Output skew (ps)

3

Operating temperature range (°C)

-40 to 85

Rating

Catalog

Output type

LVCMOS, LVDS, LVPECL

Input type

LVDS

WQFN (RHS)

48

49 mm² (7 mm × 7 mm)

Pin control mode or MICROWIRE (SPI)
Input and output frequency range: 1 kHz to 3.1 GHz
Separate input for clock output banks A and B
14 differential clock outputs in two banks (A and B)
- Output Bank A
  - 8 differential, programmable outputs (up to 8 as LVCMOS)
  - Divider values of 1 to 8, even and odd.
- Output Bank B
  - 6 differential outputs (or up to 12 as LVCMOS)
  - Divides values of 1 to 1045 or 1 to 8, even and odd
  - Analog and digital delays
50% duty cycle on all outputs for all divides
Separate synchronization of bank A and B.
RMS additive jitter 50 fs at 800 MHz
- 50-fs RMS additive jitter (12 kHz to 20 MHz)
Industrial temperature range: –40°C to 85°C
3.15-V to 3.45-V Operation

Pin control mode or MICROWIRE (SPI)
Input and output frequency range: 1 kHz to 3.1 GHz
Separate input for clock output banks A and B
14 differential clock outputs in two banks (A and B)
- Output Bank A
  - 8 differential, programmable outputs (up to 8 as LVCMOS)
  - Divider values of 1 to 8, even and odd.
- Output Bank B
  - 6 differential outputs (or up to 12 as LVCMOS)
  - Divides values of 1 to 1045 or 1 to 8, even and odd
  - Analog and digital delays
50% duty cycle on all outputs for all divides
Separate synchronization of bank A and B.
RMS additive jitter 50 fs at 800 MHz
- 50-fs RMS additive jitter (12 kHz to 20 MHz)
Industrial temperature range: –40°C to 85°C
3.15-V to 3.45-V Operation

The LMK01801 is a very low noise solution for clocking systems that require distribution and frequency division of precision clocks.

The LMK01801 features extremely low residual noise, frequency division, digital and analog delay adjustments, and fourteen (14) programmable differential outputs: LVPECL, LVDS and LVCMOS (2 outputs per differential output).

The LMK01801 features two independent inputs that can be driven differentially (LVDS, LVPECL) or in single-ended mode (LVCMOS, RF Sinewave). The first input drives output Bank A consisting of eight (8) outputs. The second input drives output Bank B consisting of six (6) outputs.

The LMK01801 is a very low noise solution for clocking systems that require distribution and frequency division of precision clocks.

The LMK01801 features extremely low residual noise, frequency division, digital and analog delay adjustments, and fourteen (14) programmable differential outputs: LVPECL, LVDS and LVCMOS (2 outputs per differential output).

The LMK01801 features two independent inputs that can be driven differentially (LVDS, LVPECL) or in single-ended mode (LVCMOS, RF Sinewave). The first input drives output Bank A consisting of eight (8) outputs. The second input drives output Bank B consisting of six (6) outputs.

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重要文件	類型	標題	格式選項	下載最新的英文版本		日期
*	資料表	LMK01801 Dual Clock Divider Buffer datasheet (Rev. D)	PDF \| HTML		2021/9/30
	應用說明	Sine to Square Wave Conversion Using Clock Buffers	PDF \| HTML		2024/9/3

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LMK01801BEVAL — LMK01801 雙時鐘分頻器緩衝器評估模組

The LMK01801 Evaluation Kit simplifies evaluation of the LMK01801 3.1 GHz Dual Clock Divider Buffer. The package consists of an Evaluation Board, Evaluation Board Instructions, and a cable for programming the device through a PC parallel port. CodeLoader 4 is the software used to program the (...)

使用指南: PDF

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軟體程式設計工具

CODELOADER — CodeLoader Device Register Programming v4.19.0

The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.

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CLOCKDESIGNTOOL — Clock Design Tool Software

時脈設計工具軟體可協助進行零件選擇、迴路濾波器設計，以及計時裝置解決方案模擬。當您輸入所需的輸出頻率和參考頻率 (選用) 時，此工具可提供符合指定需求、分頻器值和建議迴路濾波器的 TI 裝置，以將抖動降到最低。

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