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RF PLL 與合成器

LMX2572

現行

6.4-GHz 低功耗寬頻 RF 合成器

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產品規格表

LMX2572

現行
產品規格表 立即訂購

產品詳細資料

Frequency (max) (MHz) 6400 Frequency (min) (MHz) 28 Normalized PLL phase noise (dBc/Hz) -232 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -124 Features FSK modulation, Flexible ramp generation, Integer-boundary spurs (IBS) removal, Integrated VCO, Phase adjustment, Wideband Current consumption (mA) 75 Integrated VCO Yes Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 6400 Frequency (min) (MHz) 28 Normalized PLL phase noise (dBc/Hz) -232 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -124 Features FSK modulation, Flexible ramp generation, Integer-boundary spurs (IBS) removal, Integrated VCO, Phase adjustment, Wideband Current consumption (mA) 75 Integrated VCO Yes Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) Loop BW dependent
VQFN (RHA) 40 36 mm² 6 x 6
  • Output frequency: 12.5 MHz to 6.4 GHz
  • Low power consumption: 75 mA at 3.3-V supply
  • –106-dBc/Hz Phase noise at 100-kHz offset with 6.4-GHz carrier
  • PLL figure of merit: –232 dBc/Hz
  • PLL normalized 1/f noise: –123.5 dBc/Hz
  • 32-Bit Fractional-N divider
  • Remove integer boundary spurs with programmable input multiplier
  • Synchronization of output phase across multiple devices
  • Support for JESD204B SYSREF with programmable delay
  • Support for ramp and chirp functions
  • Support for FSK direct digital modulation
  • Two programmable output power level differential outputs
  • Fast VCO calibration speed: < 20 µs
  • Single 3-V to 3.5-V power supply
  • Output frequency: 12.5 MHz to 6.4 GHz
  • Low power consumption: 75 mA at 3.3-V supply
  • –106-dBc/Hz Phase noise at 100-kHz offset with 6.4-GHz carrier
  • PLL figure of merit: –232 dBc/Hz
  • PLL normalized 1/f noise: –123.5 dBc/Hz
  • 32-Bit Fractional-N divider
  • Remove integer boundary spurs with programmable input multiplier
  • Synchronization of output phase across multiple devices
  • Support for JESD204B SYSREF with programmable delay
  • Support for ramp and chirp functions
  • Support for FSK direct digital modulation
  • Two programmable output power level differential outputs
  • Fast VCO calibration speed: < 20 µs
  • Single 3-V to 3.5-V power supply

The LMX2572 is a low-power, high-performance wideband synthesizer that can generate any frequency from 12.5 MHz to 6.4 GHz without using an internal doubler. The PLL delivers excellent performance while consuming just 75 mA from a single 3.3-V supply.

For applications like digital mobile radio (DMR) and wireless microphones, the LMX2572 supports FSK modulation. Discrete level FSK and pulse-shaping FSK are supported. Direct digital FSK modulation is achievable through programming or pins.

The LMX2572 allows users to synchronize the output of multiple devices and also enables applications that need deterministic delay between input and output. The LMX2572 provides an option to adjust the phase with fine granularity to account for delay mismatch on the board or within devices. A frequency ramp generator can synthesize up to two segments of ramp in an automatic ramp generation option or a manual option for maximum flexibility. The fast calibration algorithm allows the user to change frequencies faster than 20 µs. The LMX2572 also supports generating or repeating SYSREF (compliant to JESD204B standard) making it an ideal low-power, low-noise clock source for clocking high-speed data converters. Fine delay adjustment is provided in this configuration to account for delay differences of board traces.

The LMX2572 integrates LDOs from a single 3.3-V supply, thus eliminating the need for onboard low-noise LDOs.

The LMX2572 is a low-power, high-performance wideband synthesizer that can generate any frequency from 12.5 MHz to 6.4 GHz without using an internal doubler. The PLL delivers excellent performance while consuming just 75 mA from a single 3.3-V supply.

For applications like digital mobile radio (DMR) and wireless microphones, the LMX2572 supports FSK modulation. Discrete level FSK and pulse-shaping FSK are supported. Direct digital FSK modulation is achievable through programming or pins.

The LMX2572 allows users to synchronize the output of multiple devices and also enables applications that need deterministic delay between input and output. The LMX2572 provides an option to adjust the phase with fine granularity to account for delay mismatch on the board or within devices. A frequency ramp generator can synthesize up to two segments of ramp in an automatic ramp generation option or a manual option for maximum flexibility. The fast calibration algorithm allows the user to change frequencies faster than 20 µs. The LMX2572 also supports generating or repeating SYSREF (compliant to JESD204B standard) making it an ideal low-power, low-noise clock source for clocking high-speed data converters. Fine delay adjustment is provided in this configuration to account for delay differences of board traces.

The LMX2572 integrates LDOs from a single 3.3-V supply, thus eliminating the need for onboard low-noise LDOs.
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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet LMX2572 6.4-GHz Low power wideband RF synthesizer with phase synchronization and JESD204B support datasheet (Rev. B) PDF | HTML 2019年 1月 29日
Application note Leveraging TI’s Clock Tools For Converter Designs PDF | HTML 2026年 4月 20日
Application note Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) PDF | HTML 2025年 4月 11日
Application brief Compilation of RF Synthesizer Resources PDF | HTML 2024年 10月 22日
Application note Sine to Square Wave Conversion Using Clock Buffers PDF | HTML 2024年 9月 3日
Circuit design MASH_SEED Optimization and Impact on Spurs (LMX2820) PDF | HTML 2024年 8月 8日
Application note Achieving Low Frequency Switchover Time for Wireless Infrastructure Applications 2018年 11月 28日
Application note LMX2571 Using a Programmable Input Multiplier to Minimize Integer Boundary Spurs 2016年 1月 12日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

LMX2572EVM — 具有相位同步功能且支援 JESD204B 的 6.4 GHz 低功耗寬頻射頻合成器

此評估模組適用於 LMX2572，這是一款低功耗高性能寬頻合成器，無需使用內部倍頻器，即可產生 13MHz 至 6.4GHz 的任何頻率。PLL 可提供絕佳性能，同時只需單一 3.3-V 電源的 75mA 即可實現。此裝置支援 JESD204B 標準（可產生或重複 SYSREF 訊號），因此最適合時鐘高速資料轉換器。透過提供 SYNC 訊號，使用者可在多個 LMX2572 裝置中同步輸出相位。LMX2572 可產生頻率斜坡，可在此評估模組中示範。此外，LMX2572 支援直接數位 FSK 調變。可為此目的將序列介面配置為 SPI 或 I2S 介面。配套的 Refernce Pro (...)
使用指南: PDF
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開發板

XMICR-3P-LMX2572 — LMX2572 X-MWblock 評估模組

X-MWblocks consist of RF and Microwave “Drop-In” components that can be used individually for prototyping or in production assemblies. X-MWblocks are easy to test, integrate, align, and configure to 60 GHz and beyond. No messy Sweat Soldering or Silver Epoxy processes are required. (...)

從：X-Microwave
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支援軟體

TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices

Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

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模擬型號

LMX2572 IBIS Model

SNAM224.ZIP (41 KB) - IBIS Model
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CAD/CAE 符號

LMX25xx Reference Pro Altium Database

SNAR037.ZIP (899 KB)
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設計工具

CLOCK-TREE-ARCHITECT — 時鐘樹架構程式設計軟體

時鐘樹架構是一款時鐘樹合成工具，可根據您的系統需求產生時鐘樹解決方案，進而簡化您的設計流程。此工具可從廣泛的計時產品資料庫中汲取資料，產生系統級多晶片計時解決方案。
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設計工具

PLLATINUMSIM-SW — PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

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VQFN (RHA) 40 Ultra Librarian
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