LMK3H2104
- Integrated BAW resonator
- No need for external XTAL/XO
- Flexible output frequency
- 2 fraction output dividers (FOD), individual channel dividers
- Up to 400MHz output frequency
- Flexible output format
- 1.2/1.8/2.5/3.3V LVCMOS
- DC- or AC-coupled LVDS
- LP-HCSL with programmable swing. LVPECL, CML and other formats can be derived from LP-HCSL
- Very low jitter
- 61fs max PCIe Gen 5 CC with SSC jitter
- 36.4fs max PCIe Gen 6 CC with SSC jitter
- 25.5fs max PCIe Gen 7 CC with SSC jitter
- PCIe Gen 1 to Gen 7 compliant
- Configurable SSC
- Programmable -0.05% to -3% down spread and ±0.025% to ±1.5% center spread, or preset -0.1%, -0.25%, -0.3% and -0.5% down spread
- 3 inputs (LMK3H2108) or 1 input (LMK3H2104) that can be bypassed to any output
- 5ms max startup time
- Fail-safe input pins can be pulled high when device power is off
- Flexible power supply
- Each VDD pin can be independently connected to = 1.8, 2.5 or 3.3V
- Each VDDO pin can be independently connected set to 1.8, 2.5 or 3.3V
- -40 to 105°C ambient temperature
LMK3H2104 and LMK3H2108 are BAW-based clock generators that do not require any external XTAL or XO. The devices can be used as PCIe clock generators or general purpose clock generators. The 2 FODs (Fractional Output Divider) provide frequency flexibility, low power and low jitter at the same time.
LMK3H2104 has up to 4 differential outputs plus 2 LVCMOS outputs or up to 10 LVCMOS outputs. LMK3H2108 has up to 8 differential outputs or 16 LVCMOS outputs.
LMK3H2104 has one clock input and LMK3H2108 has three clock inputs. The clock inputs provide clock multiplexing and buffering ability. Each output bank can independently select any clock source.
The GPI and GPIO pins provide additional control flexibility. These pins can be configured as individual OE, grouped OE, I2C address selection, OTP page selection, PWRGD/PWRDN#, status output and other functions.
The device supports one-time programmable (OTP) non-volatile memory which can be customized and factory preprogrammed.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LMK3H2104 and LMK3H2108 4- or 8-Output PCIe Gen 1-6 Compliant Low jitter General Purpose BAW Clock Generator datasheet (Rev. A) | PDF | HTML | 2025/10/30 | ||
| * | 使用指南 | LMK3H2104A01 Register Map | PDF | HTML | 2026/1/22 | ||
| * | 使用指南 | LMK3H2104A0E Register Map | PDF | HTML | 2026/1/22 | ||
| * | 使用指南 | LMK3H2104A09 Register Map | PDF | HTML | 2026/1/22 | ||
| * | 使用指南 | LMK3H2104A0D Register Map | PDF | HTML | 2026/1/22 | ||
| * | 使用指南 | LMK3H2104A10 Register Map | PDF | HTML | 2026/1/21 | ||
| 使用指南 | LMK3H2104A0E Configuration Guide | PDF | HTML | 2026/1/22 | |||
| 使用指南 | LMK3H2104(L) Configuration Addendum | PDF | HTML | 2026/1/22 | |||
| 使用指南 | LMK3H2104A09 Configuration Guide | PDF | HTML | 2026/1/22 | |||
| 使用指南 | LMK3H2104x02 Register Map | PDF | HTML | 2026/1/22 | |||
| 使用指南 | LMK3H2104A01 Configuration Guide | PDF | HTML | 2026/1/22 | |||
| 使用指南 | LMK3H2104 Register Map | PDF | HTML | 2025/8/21 | |||
| 證書 | LMK3H2104EVM EU Declaration of Conformity (DoC) | 2025/7/22 |
設計與開發
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|---|---|---|
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訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。