SPRUJC6B October 2025 – April 2026 AM2752-Q1 , AM2754-Q1
This is the override value of the rate for the Output clock recovery loop 1. This contains the upper 16 bits of the Output clock recovery loop
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| AASRC0 | 02D0 02D4h |
| AASRC1 | 02D4 02D4h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | OVERRIDE_RATE | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RATE_INT_HI | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RATE_INT_HI | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:17 | RESERVED | R | 0h | Always read as 0 |
| 16 | OVERRIDE_RATE | R/W | 0h | This is the upper 16 bits of the integer multiple of the rate for the output override clock recovery loop 1 |
| 15:0 | RATE_INT_HI | R/W | 0h | This is the Upper 16 bits of the integer multiple of the rate for the output override clock recovery loop 1 |