MSPM0G1518

활성

듀얼 뱅크 256kB 플래시, 128kB SRAM, 2xADC, DAC, 3xCOMP가 포함된 80MHz ARM® Cortex®-M0+ MCU | PM | 64

제품 상세 정보

CPU Arm Cortex-M0+ Frequency (MHz) 80 Flash memory (kByte) 256 RAM (kByte) 128 ADC type 12-bit SAR Features 5-V-tolerant I/Os, AES encryption, Comparator, DAC, DMA, LIN, MATHACL, RTC UART 7 Number of ADC channels 15, 19, 27 SPI 3 Hardware accelerators Trigonometric math accelerator Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface I2C, LIN, SPI, UART Operating system FreeRTOS, Zephyr RTOS Nonvolatile memory (kByte) 256 Number of GPIOs 28, 44, 60, 74, 94 Number of I2Cs 3 Security Cryptographic acceleration, Hardware-enforced isolation, Secure boot, Secure communication, Secure debug, Secure firmware & software update, Secure storage, Software IP protection
CPU Arm Cortex-M0+ Frequency (MHz) 80 Flash memory (kByte) 256 RAM (kByte) 128 ADC type 12-bit SAR Features 5-V-tolerant I/Os, AES encryption, Comparator, DAC, DMA, LIN, MATHACL, RTC UART 7 Number of ADC channels 15, 19, 27 SPI 3 Hardware accelerators Trigonometric math accelerator Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface I2C, LIN, SPI, UART Operating system FreeRTOS, Zephyr RTOS Nonvolatile memory (kByte) 256 Number of GPIOs 28, 44, 60, 74, 94 Number of I2Cs 3 Security Cryptographic acceleration, Hardware-enforced isolation, Secure boot, Secure communication, Secure debug, Secure firmware & software update, Secure storage, Software IP protection
LQFP (PM) 64 144 mm² 12 x 12 LQFP (PN) 80 196 mm² 14 x 14 LQFP (PT) 48 81 mm² 9 x 9 LQFP (PZ) 100 256 mm² 16 x 16 NFBGA (ZAW) 100 81 mm² 9 x 9 VQFN (RGZ) 48 49 mm² 7 x 7 VQFN (RHB) 32 25 mm² 5 x 5
  • Core
    • Arm 32-bit Cortex M0+ CPU with memory protection unit, frequency up to 80MHz
  • PSA-L1 Certification targeted
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 512KB of flash memory with error correction code (ECC)
      • Dual-bank with address swap for OTA updates

    • 16KB data flash bank with ECC protection
    • 128KB total SRAM
      • SRAM (Bank 0): 64kB SRAM with ECC protection or hardware parity, and retention down to STANDBY mode
      • SRAM (Bank 1): 64kB SRAM with retention down to STOP mode
  • High-performance analog peripherals
    • Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
      • 14-bit effective resolution at 250ksps with hardware averaging
    • Three high-speed comparators (COMP) with integrated 8-bit reference DACs
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • One 12-bit 1Msps digital-to-analog converter (DAC) with integrated output buffer
    • Programmable analog connections between ADC, COMP and DAC
    • Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 123µA/MHz (CoreMark)
    • SLEEP: 38µA/MHz
    • STOP: 223µA at 4MHz
    • STANDBY: 1.7µA at 32kHz with RTC and SRAM Bank 0 and state retention
    • SHUTDOWN: 92nA with IO wake-up capability
  • Intelligent digital peripherals
    • 12-channel DMA controller
    • Math accelerator supports DIV, SQRT, MAC and TRIG computations
    • Nine timers support up to 28 PWM channels
      • Two 16-bit general-purpose timers support QEI
      • Four 16-bit general-purpose timers support low-power operation in STANDBY mode
      • One 32-bit general-purpose timer
      • Two 16-bit advanced timers with deadband support and complimentary outputs up to 12 PWM channels
    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Seven UART interfaces
      • Two supporting LIN, IrDA, DALI, Smart Card, Manchester
      • Three supporting low-power operation in STANDBY mode
    • Three I2C interfaces supporting up to FM+ (1Mbit/s), SMBus/PMBus, and wakeup from STOP mode
    • Three SPI interfaces, with one supporting up to 32Mbits/s
    • Two Controller Area Network (CAN) interfaces support CAN 2.0 A or B and CAN-FD
  • Clock system
    • Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80MHz
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4 to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Data integrity and encryption
    • AES-128/256 accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • True random number generator (TRNG)
    • Cyclic redundancy checker (CRC-16, CRC-32)
  • Flexible I/O features
    • Up to 94 GPIOs
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Four high-speed IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 100-pin nFBGA (ZAW) (0.8mm pitch)
    • 100-pin LQFP (PZ) (0.5mm pitch)
    • 80-pin LQFP (PN) (0.5mm pitch)
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch)
    • 42-pin DSBGA (YCJ) (0.35mm pitch) - Preview
    • 32-pin VQFN (RHB) (0.5mm pitch)
  • Family members (also see Device Comparison)
    • MSPM0G1518: 256KB flash, 128KB RAM
    • MSPM0G1519: 512KB flash, 128KB RAM
    • MSPM0G3518: 256KB flash, 128KB RAM
    • MSPM0G3519: 512KB flash, 128KB RAM
  • Development kits and software (also see Tools and Software)
  • Core
    • Arm 32-bit Cortex M0+ CPU with memory protection unit, frequency up to 80MHz
  • PSA-L1 Certification targeted
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 512KB of flash memory with error correction code (ECC)
      • Dual-bank with address swap for OTA updates

    • 16KB data flash bank with ECC protection
    • 128KB total SRAM
      • SRAM (Bank 0): 64kB SRAM with ECC protection or hardware parity, and retention down to STANDBY mode
      • SRAM (Bank 1): 64kB SRAM with retention down to STOP mode
  • High-performance analog peripherals
    • Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
      • 14-bit effective resolution at 250ksps with hardware averaging
    • Three high-speed comparators (COMP) with integrated 8-bit reference DACs
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • One 12-bit 1Msps digital-to-analog converter (DAC) with integrated output buffer
    • Programmable analog connections between ADC, COMP and DAC
    • Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 123µA/MHz (CoreMark)
    • SLEEP: 38µA/MHz
    • STOP: 223µA at 4MHz
    • STANDBY: 1.7µA at 32kHz with RTC and SRAM Bank 0 and state retention
    • SHUTDOWN: 92nA with IO wake-up capability
  • Intelligent digital peripherals
    • 12-channel DMA controller
    • Math accelerator supports DIV, SQRT, MAC and TRIG computations
    • Nine timers support up to 28 PWM channels
      • Two 16-bit general-purpose timers support QEI
      • Four 16-bit general-purpose timers support low-power operation in STANDBY mode
      • One 32-bit general-purpose timer
      • Two 16-bit advanced timers with deadband support and complimentary outputs up to 12 PWM channels
    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Seven UART interfaces
      • Two supporting LIN, IrDA, DALI, Smart Card, Manchester
      • Three supporting low-power operation in STANDBY mode
    • Three I2C interfaces supporting up to FM+ (1Mbit/s), SMBus/PMBus, and wakeup from STOP mode
    • Three SPI interfaces, with one supporting up to 32Mbits/s
    • Two Controller Area Network (CAN) interfaces support CAN 2.0 A or B and CAN-FD
  • Clock system
    • Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80MHz
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4 to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Data integrity and encryption
    • AES-128/256 accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • True random number generator (TRNG)
    • Cyclic redundancy checker (CRC-16, CRC-32)
  • Flexible I/O features
    • Up to 94 GPIOs
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Four high-speed IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 100-pin nFBGA (ZAW) (0.8mm pitch)
    • 100-pin LQFP (PZ) (0.5mm pitch)
    • 80-pin LQFP (PN) (0.5mm pitch)
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch)
    • 42-pin DSBGA (YCJ) (0.35mm pitch) - Preview
    • 32-pin VQFN (RHB) (0.5mm pitch)
  • Family members (also see Device Comparison)
    • MSPM0G1518: 256KB flash, 128KB RAM
    • MSPM0G1519: 512KB flash, 128KB RAM
    • MSPM0G3518: 256KB flash, 128KB RAM
    • MSPM0G3519: 512KB flash, 128KB RAM
  • Development kits and software (also see Tools and Software)

MSPM0Gx51x microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 256KB to 512KB of flash memory in small packages or high pin count packages (up to 100 pins). These devices include dual CAN-FD controllers, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.

The device has up to 512KB of embedded flash program memory with built-in error correction code (ECC) and up to 128KB SRAM (with ECC and parity protection for the first 64kB). The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.

Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes, as well as a TRNG entropy source. The cybersecurity architecture is pending Arm® PSA Level 1 certification.

A set of high performance analog modules is provided, such as two simultaneously sampling 12-bit, 4Msps ADCs supporting up to 27 external channels, on-chip voltage reference (1.4V or 2.5V), one 12-bit 1Msps DAC, and three comparators operable in low-power and high-speed modes with additional built-in 8-bit reference DACs .

The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration allowing for customers find the MCU that meets their project’s needs. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.

MSPM0Gx51x MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.

For complete module descriptions, see the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.

MSPM0Gx51x microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 256KB to 512KB of flash memory in small packages or high pin count packages (up to 100 pins). These devices include dual CAN-FD controllers, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.

The device has up to 512KB of embedded flash program memory with built-in error correction code (ECC) and up to 128KB SRAM (with ECC and parity protection for the first 64kB). The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.

Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes, as well as a TRNG entropy source. The cybersecurity architecture is pending Arm® PSA Level 1 certification.

A set of high performance analog modules is provided, such as two simultaneously sampling 12-bit, 4Msps ADCs supporting up to 27 external channels, on-chip voltage reference (1.4V or 2.5V), one 12-bit 1Msps DAC, and three comparators operable in low-power and high-speed modes with additional built-in 8-bit reference DACs .

The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration allowing for customers find the MCU that meets their project’s needs. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.

MSPM0Gx51x MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.

For complete module descriptions, see the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.

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62개 모두 보기
상위 문서 유형 직함 형식 옵션 날짜
* Data sheet MSPM0Gx51x Mixed-Signal Microcontrollers With CAN-FD Interface datasheet (Rev. B) PDF | HTML 2025/10/13
* Errata MSPM0Gx51x Mixed-Signal Microcontrollers Errata (Rev. D) PDF | HTML 2025/12/10
* User guide MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual (Rev. C) 2025/08/19
Application note Live Firmware Update via Flash Bank Swap PDF | HTML 2026/01/30
Application note Cybersecurity Enablers in MSPM0 MCUs (Rev. A) PDF | HTML 2025/12/10
Application note EMC Improvement Guide for MSPM0 (Rev. A) PDF | HTML 2025/12/02
Application note MSPM0 ADC Noise Analysis and Application (Rev. A) PDF | HTML 2025/11/14
Subsystem design ADC to I2C (Rev. A) PDF | HTML 2025/09/10
Subsystem design ADC to UART (Rev. A) PDF | HTML 2025/09/09
Subsystem design Thermistor Temperature Sensing (Rev. A) PDF | HTML 2025/09/09
Subsystem design ADC to SPI (Rev. A) PDF | HTML 2025/08/27
Subsystem design Digital FIR Filter (Rev. A) PDF | HTML 2025/08/27
User guide MSPM0 MCUs Development Guide (Rev. G) PDF | HTML 2025/08/27
Subsystem design Digital IIR Filter (Rev. A) PDF | HTML 2025/08/26
Subsystem design Power Sequencer (Rev. A) PDF | HTML 2025/08/25
Subsystem design 5V Interface (Rev. A) PDF | HTML 2025/08/20
Subsystem design Data Sensor Aggregator Subsystem Design (Rev. A) PDF | HTML 2025/08/20
Subsystem design CAN to I2C Bridge (Rev. A) PDF | HTML 2025/08/19
Subsystem design CAN to SPI Bridge (Rev. A) PDF | HTML 2025/08/19
Subsystem design CAN to UART bridge (Rev. A) PDF | HTML 2025/08/19
Subsystem design PWM Control Using Push-Buttons PDF | HTML 2025/08/14
Subsystem design Using MSPM0 as a Watchdog Timer PDF | HTML 2025/08/14
Subsystem design Emulate EEPROM with FLASH (Type A) (Rev. A) PDF | HTML 2025/08/13
Functional safety information Functional Safety Manual for MSPM0Gx51x PDF | HTML 2025/08/13
Subsystem design Emulate EEPROM With FLASH (Type B) (Rev. A) PDF | HTML 2025/08/06
Subsystem design Frequency Counter: Tone Detection (Rev. A) PDF | HTML 2025/08/06
Analog Design Journal 모터 컨트롤의 위치 센서 선택 PDF | HTML 2025/07/10
Subsystem design Simultaneous Sampling of ADCs PDF | HTML 2025/06/30
Application note Capturing PWM 0% to 100% Duty Cycle with MSPM0 MCU PDF | HTML 2025/06/12
Application note Migration Guide From STM8 to MSPM0 (Rev. A) PDF | HTML 2025/05/21
White paper MSPM0 MCU Advantages in Automotive Application PDF | HTML 2025/03/11
Application note LIN Basics and Implementation on MSPM0 PDF | HTML 2025/02/21
Application note Laser Speckle Reduction Solution in Projector based on MSPM0 MCU PDF | HTML 2025/02/20
User guide Migration Guide From NXP to MSPM0 PDF | HTML 2025/02/03
Application note Closed Loop Constant Power Drive to Simplify Heater Element Control and Extend Battery Life PDF | HTML 2025/01/29
Application note Flash Multi Bank Feature in MSPM0 Family PDF | HTML 2025/01/08
Application note BQ79616 Control Based on MSPM0 Through UART to CAN PDF | HTML 2024/12/16
Application note MSPM0G3507 Low Power Test and Guidance PDF | HTML 2024/10/18
Application note Understanding the MSPM0 Debug Subsystem PDF | HTML 2024/09/23
Application note A2L Refrigerant Standard Overview and TI Mitigation Control Board Designs for Designers PDF | HTML 2024/09/16
Application note TPS929xxx LED Driver Control Using MSPM0 Through UART Over CAN PDF | HTML 2024/09/04
Application note SPI to CAN Bridge on MSPM0 MCUs PDF | HTML 2024/08/28
Application brief Bridge Design Between CAN and SPI with MSPM0 MCUs PDF | HTML 2024/06/17
Application brief Bridge Design Between CAN and UART with MSPM0 MCUs PDF | HTML 2024/06/17
Application brief Bridge Design between CAN and I2C with MSPM0 MCUs 2024/06/17
Application note Designing Temperature Monitoring Systems with NTC and RTD PDF | HTML 2024/05/15
Application brief Automotive Seat Comfort Module Using MSPM0 PDF | HTML 2024/05/01
Application note Realization of Password-Protected Debug Based on Software PDF | HTML 2024/03/06
Technical article 진화하는 EV 충전 시장에서 호환성이 중요한 이유 PDF | HTML 2024/01/26
Product overview Realizing UWB Passive Entry Passive Start (PEPS) Design with MSPM0 MCU PDF | HTML 2024/01/12
Product overview Realizing HVAC FAN Control Design with MSPM0 MCU PDF | HTML 2023/12/21
Application note MSPM0 Enables Cost-Effective Field Transmitter Applications PDF | HTML 2023/12/15
Application note Operating Time of MSPM0 Powered by a Capacitor PDF | HTML 2023/10/03
Application note EEPROM Emulation Type A Solution PDF | HTML 2023/04/18
Application note EEPROM Emulation Type B Design PDF | HTML 2023/04/11
Application brief Increasing Flexibility in Your Battery Management Designs With a Low-Cost MSPM0 PDF | HTML 2023/03/02
Application brief Optimizing Field Sensor and Transmitter Applications With MSPM0 MCUs PDF | HTML 2023/03/02
Application brief Simplifying Pulse Oximeter Designs With Low-Cost Highly Integrated MSPM0 MCUs PDF | HTML 2023/03/02
Application note MSPM0 G-Series MCUs Power Optimization Guide PDF | HTML 2023/02/22
White paper MSPM0: Idea to Product With Easy-to-Use Tools, Software, and Academy PDF | HTML 2023/02/22
Application note Make System Design Easy With MSPM0 Precision Analog PDF | HTML 2023/02/22
Application note MSPM0L or MSPM0G: How to Pick the Right MSP Microcontroller for Your Application PDF | HTML 2022/12/13

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Explore a vast library of example projects, categorized by application type, with support for multiple development environments
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MSP-MOTOR-CONTROL MSPM0 Firmware solutions for motor control applications

MSP Motor Control is a collection of software, tools and examples to spin motors in 30 minutes or less with MSPM0 Arm® Cortex® M0+ MCUs and popular motor driver solutions.

MSP Motor Control provides examples for supported hardware kits to spin brushed, stepper, and three-phase motors with sensored (...)

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TI-DEVELOPER-ZONE Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

IDE, 구성, 컴파일러 또는 디버거

CCSTUDIO Code Composer Studio integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

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IDE, 구성, 컴파일러 또는 디버거

MSP-ZERO-CODE-STUDIO Graphical development environment for designing applications for MSP microcontrollers

MSP Zero Code Studio is a visual design environment that simplifies firmware development, making it possible to configure, develop, and run microcontroller applications in minutes with zero coding and no IDE required. Available as a standalone download or on the cloud.

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

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IDE, 구성, 컴파일러 또는 디버거

SYSCONFIG Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

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온라인 교육

MSPM0-ACADEMY MSPM0 Academy

MSPM0 Academy delivers easy-to-use training modules that span a wide range of topics and LaunchPads in the MSPM0 MCU portfolio.
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지원되는 제품 및 하드웨어

운영 체제(OS)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
소프트웨어 프로그래밍 도구

MSP-GANG-SOFTWARE MSP-GANG Software

The MSP Gang Programmer (MSP-GANG) is a MSPM0/MSP430/MSP432 device programmer that can program up to eight identical devices at the same time.
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소프트웨어 프로그래밍 도구

UNIFLASH UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

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패키지 CAD 기호, 풋프린트 및 3D 모델
LQFP (PM) 64 Ultra Librarian
LQFP (PN) 80 Ultra Librarian
LQFP (PT) 48 Ultra Librarian
LQFP (PZ) 100 Ultra Librarian
NFBGA (ZAW) 100 Ultra Librarian
VQFN (RGZ) 48 Ultra Librarian
VQFN (RHB) 32 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

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콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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