F29P329SM-Q1

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차량용 C2000 64비트 MCU, C29x 200MHz, 록스텝, 기능 안전 준수, 2MB

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TI functional safety category Functional Safety-Compliant Operating temperature range (°C) to Rating Automotive
TI functional safety category Functional Safety-Compliant Operating temperature range (°C) to Rating Automotive
HTQFP (PZS) 100 196 mm² 14 x 14

Real-time Processing

  • Three C29x 64-bit CPUs (CPU1, CPU2, CPU3) running at 200MHz
    • 2x signal chain performance versus C28x with improved pipeline
    • Split lock and lockstep operating modes
  • C29x CPU architecture
    • Byte addressability
    • High-performance real-time control with low latency
    • High-performance DSP and general-purpose processing capabilities
    • VLIW CPU executes 1 to 8 instructions in parallel
    • Fully protected pipeline
    • 8/16/32/64-bit single-cycle memory operations, up to two 64-bit memory reads and one 64-bit memory write in a single-cycle
    • IEEE 32-bit and 64-bit floating operations
    • 32-bit and 64-bit trigonometric operations
    • HW interrupt prioritization and nesting
    • 11-cycle real-time interrupt response
    • Atomic operations with memory protection
    • Multi safe island code execution managed in hardware

Memory

  • 4MB of CPU-mappable flash (ECC-protected) capable of supporting Firmware Over the Air (FOTA) with A/B swap and LFU
  • 256KB of Data-only Flash (ECC-protected)
  • 452KB of RAM (ECC-protected)
  • Dedicated 512KB Flash and 40KB RAM memories for HSM (ECC-protected)
  • Built in ECC logic for system-wide safety

Safety Peripherals

  • CPU1 and CPU2 lockstep
    • CPU1 and CPU2 splitlock mode is also available (for applications not needing functional safety or using methods like Reciprocal Comparison with multiple CPUs)
  • Logic Power-On Self-Test (LPOST)
  • Memory Power-On Self-Test (MPOST)
  • Error Signaling Module (ESM)
  • Dual-clock Comparator (DCC)
  • Waveform Analyzer and Diagnostics (WADI)
  • Context-sensitive Memory and Peripheral Protection with SSU
  • Safety Interconnect (SIC)
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications
    • Documentation to aid ISO 26262 and IEC 61508 system design will be available upon production release
    • Systematic capability up to ASIL D and SIL 3 targeted
    • Hardware capability up to ASIL D and SIL 3 targeted
  • Safety-related certification
    • ISO 26262 certification up to ASIL D and IEC 61508 SIL 3 by TÜV SÜD planned

Security

  • Hardware Security Module (HSM)
    • Independently running Arm Cortex-M4 based security controller subsystem at 100MHz
    • 512KB of flash (ECC-protected)
    • 36KB of RAM (ECC-protected)
    • Secure key storage
    • Secure BOOT
    • Secure Debug
    • Dedicated 8-channel Real-Time Direct Memory Access (RTDMA) controller
    • EVITA-full support
    • FOTA with A/B swap
    • Hardware cryptographic accelerators
      • Asymmetric cryptography - RSA, ECC, SM2
      • Symmetric cryptography - AES, SM4
      • Hash operations - SHA2, HMAC, SM3
      • True Random Number Generator
  • Safety and Security Unit (SSU)
    • Advanced Real-Time Safety and Security
      • 64 Memory Access Protection Ranges per CPU
      • Up to 15 user LINKs and 7 stack pointers per CPU for hardware code isolation
      • Power-on Self-test (POST) capability
      • FOTA and LFU support with rollback control

Analog Subsystem

  • Five Analog-to-Digital Converters (ADCs)
    • Two 16-bit ADCs, 1.19MSPS each
    • Three 12-bit ADCs, 3.92MSPS each
    • Up to 80 single-ended or 16 differential inputs
    • 40 redundant input channels for flexibility
    • Separate sample-and-hold (S/H) on each ADC for simultaneous sampling
    • Hardware post-processing of conversions
    • Hardware oversampling (up to 128x) and undersampling modes, with accumulation, averaging and outlier rejection
    • Programmable delay from SOC trigger to start of conversion
    • Ten ADC Safety Checkers for comparison of conversion results across multiple ADC modules
  • 12 windowed comparators with 12-bit Digital-to-Analog Converter (DAC) references
    • Connection options for internal temperature sensor and ADC reference
  • Two 12-bit buffered DAC outputs

Control Peripherals

  • 36 Pulse Width Modulator (PWM) channels, all with high-resolution capability (HRPWM)
    • Minimum Dead-Band Logic (MINDB)
    • Illegal Combo Logic (ICL) for standard and high resolution
    • Diode Emulation (DE) support
    • Multilevel shadowing on XCMP
  • Six Enhanced Capture (eCAP) modules
    • High-resolution Capture (HRCAP) available on two of the six eCAP modules
    • Two new monitor units for edge, pulse width and period that can be coupled with ePWM strobes and trip events
    • Increased 256 multiplexed capture inputs
    • New ADC SOC generation capability
  • Six Enhanced Quadrature Encoder Pulse (eQEP) modules
  • 16 Sigma-Delta Filter Module (SDFM) input channels, 2 independent filters per channel
  • Embedded Pattern Generator (EPG)
  • Configurable Logic Block (CLB)
    • Six tiles
    • Augments existing peripheral capability
    • Supports position manager solutions

Communications Peripherals

  • EtherCAT SubordinateDevice (or SubDevice) Controller (ESC)
  • Fast Serial Interface (FSI) with four transmitters and four receivers
  • Five high-speed (up to 50MHz) SPI ports (pin-bootable)
  • Six High-Speed Universal Asynchronous Receiver/Transmitters (UARTs) (pin-bootable)
  • Two I2C interfaces (pin-bootable)
  • Two Local Interconnect Network (LIN) (supports SCI)
  • Power-Management Bus (PMBus) interface (supports I2C)
  • Six Single Edge Nibble Transmission interface (SENT)
  • Six Controller Area Networks with Flexible Data Rate (CAN FD/MCAN) (pin-bootable)

Systems Peripherals

  • External Memory Interface (EMIF) with ASRAM and SDRAM support
  • Two 10-channel Real-Time Direct Memory Access (RTDMA) controllers with MPU
  • Up to 190 usable signal pins
    • 136 General-Purpose Input/Output (GPIO) pins
    • 80 analog pins (26 AGPIOs included in GPIOs)
    • 5V fail-safe and tolerant capability on 6 GPIOs for PMBUS/I2C/SENT support
  • Peripheral Interrupt Priority and Expansion (PIPE)
  • Low-power mode (LPM) support
  • Embedded Real-time Analysis and Diagnostic (ERAD)

Clock and System Control

  • On-chip crystal oscillator
  • Windowed watchdog timer module
  • Missing clock detection circuitry
  • 1.25V core, 3.3V I/O design
    • Internal VREG for 1.25V generation
    • Brownout reset (BOR) circuit

Package Options:

  • Lead-free, green packaging
  • 256-ball New Fine Pitch Ball Grid Array (nFBGA) [ZEX suffix], 13mm x 13mm/0.8mm pitch
  • 176-pin Thermally Enhanced Thin Quad Flatpack (HTQFP) [PTS suffix], 22mm x 22mm/0.4mm pitch
  • 144-pin HTQFP [RFS suffix],18mm x 18mm/0.4mm pitch
  • 100-pin HTQFP [PZS suffix],14mm x 14mm/0.4mm pitch

Recommended TPS653860-Q1 and TPS650366-Q1 Power Management ICs (PMIC)

  • Companion PMICs specially designed to meet device power supply requirements
  • Flexible mapping and factory programmed configurations to support different use cases
  • Functional safety compliant PMICs to support external voltage monitoring and watchdog timer MCU safety requirements

Temperature

  • Ambient (TA): –40°C to 125°C

Real-time Processing

  • Three C29x 64-bit CPUs (CPU1, CPU2, CPU3) running at 200MHz
    • 2x signal chain performance versus C28x with improved pipeline
    • Split lock and lockstep operating modes
  • C29x CPU architecture
    • Byte addressability
    • High-performance real-time control with low latency
    • High-performance DSP and general-purpose processing capabilities
    • VLIW CPU executes 1 to 8 instructions in parallel
    • Fully protected pipeline
    • 8/16/32/64-bit single-cycle memory operations, up to two 64-bit memory reads and one 64-bit memory write in a single-cycle
    • IEEE 32-bit and 64-bit floating operations
    • 32-bit and 64-bit trigonometric operations
    • HW interrupt prioritization and nesting
    • 11-cycle real-time interrupt response
    • Atomic operations with memory protection
    • Multi safe island code execution managed in hardware

Memory

  • 4MB of CPU-mappable flash (ECC-protected) capable of supporting Firmware Over the Air (FOTA) with A/B swap and LFU
  • 256KB of Data-only Flash (ECC-protected)
  • 452KB of RAM (ECC-protected)
  • Dedicated 512KB Flash and 40KB RAM memories for HSM (ECC-protected)
  • Built in ECC logic for system-wide safety

Safety Peripherals

  • CPU1 and CPU2 lockstep
    • CPU1 and CPU2 splitlock mode is also available (for applications not needing functional safety or using methods like Reciprocal Comparison with multiple CPUs)
  • Logic Power-On Self-Test (LPOST)
  • Memory Power-On Self-Test (MPOST)
  • Error Signaling Module (ESM)
  • Dual-clock Comparator (DCC)
  • Waveform Analyzer and Diagnostics (WADI)
  • Context-sensitive Memory and Peripheral Protection with SSU
  • Safety Interconnect (SIC)
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications
    • Documentation to aid ISO 26262 and IEC 61508 system design will be available upon production release
    • Systematic capability up to ASIL D and SIL 3 targeted
    • Hardware capability up to ASIL D and SIL 3 targeted
  • Safety-related certification
    • ISO 26262 certification up to ASIL D and IEC 61508 SIL 3 by TÜV SÜD planned

Security

  • Hardware Security Module (HSM)
    • Independently running Arm Cortex-M4 based security controller subsystem at 100MHz
    • 512KB of flash (ECC-protected)
    • 36KB of RAM (ECC-protected)
    • Secure key storage
    • Secure BOOT
    • Secure Debug
    • Dedicated 8-channel Real-Time Direct Memory Access (RTDMA) controller
    • EVITA-full support
    • FOTA with A/B swap
    • Hardware cryptographic accelerators
      • Asymmetric cryptography - RSA, ECC, SM2
      • Symmetric cryptography - AES, SM4
      • Hash operations - SHA2, HMAC, SM3
      • True Random Number Generator
  • Safety and Security Unit (SSU)
    • Advanced Real-Time Safety and Security
      • 64 Memory Access Protection Ranges per CPU
      • Up to 15 user LINKs and 7 stack pointers per CPU for hardware code isolation
      • Power-on Self-test (POST) capability
      • FOTA and LFU support with rollback control

Analog Subsystem

  • Five Analog-to-Digital Converters (ADCs)
    • Two 16-bit ADCs, 1.19MSPS each
    • Three 12-bit ADCs, 3.92MSPS each
    • Up to 80 single-ended or 16 differential inputs
    • 40 redundant input channels for flexibility
    • Separate sample-and-hold (S/H) on each ADC for simultaneous sampling
    • Hardware post-processing of conversions
    • Hardware oversampling (up to 128x) and undersampling modes, with accumulation, averaging and outlier rejection
    • Programmable delay from SOC trigger to start of conversion
    • Ten ADC Safety Checkers for comparison of conversion results across multiple ADC modules
  • 12 windowed comparators with 12-bit Digital-to-Analog Converter (DAC) references
    • Connection options for internal temperature sensor and ADC reference
  • Two 12-bit buffered DAC outputs

Control Peripherals

  • 36 Pulse Width Modulator (PWM) channels, all with high-resolution capability (HRPWM)
    • Minimum Dead-Band Logic (MINDB)
    • Illegal Combo Logic (ICL) for standard and high resolution
    • Diode Emulation (DE) support
    • Multilevel shadowing on XCMP
  • Six Enhanced Capture (eCAP) modules
    • High-resolution Capture (HRCAP) available on two of the six eCAP modules
    • Two new monitor units for edge, pulse width and period that can be coupled with ePWM strobes and trip events
    • Increased 256 multiplexed capture inputs
    • New ADC SOC generation capability
  • Six Enhanced Quadrature Encoder Pulse (eQEP) modules
  • 16 Sigma-Delta Filter Module (SDFM) input channels, 2 independent filters per channel
  • Embedded Pattern Generator (EPG)
  • Configurable Logic Block (CLB)
    • Six tiles
    • Augments existing peripheral capability
    • Supports position manager solutions

Communications Peripherals

  • EtherCAT SubordinateDevice (or SubDevice) Controller (ESC)
  • Fast Serial Interface (FSI) with four transmitters and four receivers
  • Five high-speed (up to 50MHz) SPI ports (pin-bootable)
  • Six High-Speed Universal Asynchronous Receiver/Transmitters (UARTs) (pin-bootable)
  • Two I2C interfaces (pin-bootable)
  • Two Local Interconnect Network (LIN) (supports SCI)
  • Power-Management Bus (PMBus) interface (supports I2C)
  • Six Single Edge Nibble Transmission interface (SENT)
  • Six Controller Area Networks with Flexible Data Rate (CAN FD/MCAN) (pin-bootable)

Systems Peripherals

  • External Memory Interface (EMIF) with ASRAM and SDRAM support
  • Two 10-channel Real-Time Direct Memory Access (RTDMA) controllers with MPU
  • Up to 190 usable signal pins
    • 136 General-Purpose Input/Output (GPIO) pins
    • 80 analog pins (26 AGPIOs included in GPIOs)
    • 5V fail-safe and tolerant capability on 6 GPIOs for PMBUS/I2C/SENT support
  • Peripheral Interrupt Priority and Expansion (PIPE)
  • Low-power mode (LPM) support
  • Embedded Real-time Analysis and Diagnostic (ERAD)

Clock and System Control

  • On-chip crystal oscillator
  • Windowed watchdog timer module
  • Missing clock detection circuitry
  • 1.25V core, 3.3V I/O design
    • Internal VREG for 1.25V generation
    • Brownout reset (BOR) circuit

Package Options:

  • Lead-free, green packaging
  • 256-ball New Fine Pitch Ball Grid Array (nFBGA) [ZEX suffix], 13mm x 13mm/0.8mm pitch
  • 176-pin Thermally Enhanced Thin Quad Flatpack (HTQFP) [PTS suffix], 22mm x 22mm/0.4mm pitch
  • 144-pin HTQFP [RFS suffix],18mm x 18mm/0.4mm pitch
  • 100-pin HTQFP [PZS suffix],14mm x 14mm/0.4mm pitch

Recommended TPS653860-Q1 and TPS650366-Q1 Power Management ICs (PMIC)

  • Companion PMICs specially designed to meet device power supply requirements
  • Flexible mapping and factory programmed configurations to support different use cases
  • Functional safety compliant PMICs to support external voltage monitoring and watchdog timer MCU safety requirements

Temperature

  • Ambient (TA): –40°C to 125°C

The Functional Block Diagram shows the CPU system and associated peripherals.

The Functional Block Diagram shows the CPU system and associated peripherals.

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상위 문서 유형 직함 형식 옵션 날짜
* Data sheet F29H85x, F29P58x, and F29P32x Real-Time Microcontrollers datasheet (Rev. C) PDF | HTML 2025/12/10
* Errata F29H85x, F29P58x, and F29P32x Real-Time MCUs Silicon Errata (Rev. C) PDF | HTML 2026/03/04
Application note Functional Safety Concept in On-Board Charger System PDF | HTML 2026/01/07
User guide F29H85x and F29P58x Real-Time Microcontrollers Technical Reference Manual (Rev. A) PDF | HTML 2025/12/23
Application note Live Firmware Update on F29x MCUs PDF | HTML 2025/12/04
User guide C29 Software Optimization Guide (Rev. B) PDF | HTML 2025/11/17
White paper Integrating EVCC, DCDC, and Host Architecture: TI Automotive MCUs for Next-Generation EV Charging (Rev. A) PDF | HTML 2025/11/13
Product overview Automotive Functional Safety for C2000™ Real-Time Microcontrollers (Rev. F) 2025/10/09
Application note Implementing Run-Time Safety and Security With the C29x Safety and Security Unit (Rev. A) PDF | HTML 2025/10/03
Application note F29x Error Handling and Debug Guide PDF | HTML 2025/09/11
Application note Second Sourcing Solution for 0.4 mm Pitch and 0.5 mm Pitch QFP Packages 2025/08/19
Application note EEPROM Emulation for Generation 3 C2000 Real-Time Controllers (Rev. B) PDF | HTML 2025/08/13
Application note MCU Control Center Tool Developer's Guide PDF | HTML 2025/08/04
Application note MCU Signal Sight Tool Developer's Guide PDF | HTML 2025/08/01
User guide C2000 Real-Time Control Peripheral Reference Guide (Rev. U) PDF | HTML 2025/07/11
User guide F29H85x Flash API User's Guide (Rev. A) PDF | HTML 2025/07/01
Application note C2000-IDE Assist Tool Migration Feature Guide PDF | HTML 2025/04/23
Product overview Industrial Functional Safety for C2000™ Real-Time Microcontrollers (Rev. F) 2025/04/23
User guide C29x CPU Reference Guide (Rev. A) PDF | HTML 2025/03/28
Application brief C2000 F29H85x and F29P58x Real-Time Microcontrollers PDF | HTML 2025/02/18
Application note C2000 IDE Assist Tool Features Guide (Rev. A) PDF | HTML 2025/01/29
Application note EEPROM Emulation Driver Guide for C29x PDF | HTML 2025/01/09
Application note DLT Developer's Guide With Tooling PDF | HTML 2024/12/23
Application note Serial Flash Programming of F29H85x™ PDF | HTML 2024/12/23
User guide Migration Between TMS320F28P65x and TMS320F29H85x PDF | HTML 2024/11/15
White paper Enabling Cybersecurity for High Performance Real-Time Control Systems with C2000™ F29x Microcontrollers PDF | HTML 2024/11/08
Application brief Optimize EPS System with C2000 F29 MCU PDF | HTML 2024/11/08
User guide Application Software Migration to the C29 CPU User's Guide PDF | HTML 2024/10/24
White paper The C29 CPU – Unrivaled Real-Time Performance with Optimized Architecture on C2000 MCUs PDF | HTML 2024/10/14
Application brief Discrete Power Design for C2000™ PDF | HTML 2024/08/15
Application note Development Tool Versions for C2000™ Support (Rev. A) PDF | HTML 2024/06/26
Product overview Implementing IEC 60730 / UL 1998 Compliance for C2000 Real-Time Microcontrollers (Rev. A) PDF | HTML 2024/06/25
Application note Obtain UL/IEC 60730-1/60335-1 Class B Certification Based on C2000™ MCU Diagnostic Library in Appliances PDF | HTML 2024/05/30
Application note Power Supply and Monitoring Solution for C2000 MCU Automotive Applications PDF | HTML 2024/04/17
Application note CAN Flash Programming of C2000™ Microcontrollers (Rev. A) PDF | HTML 2024/04/15
White paper Achieving High Efficiency and Enabling Integration in EV Powertrain Subsystems (Rev. A) PDF | HTML 2023/07/17
Application note CRC Engines in C2000 Devices (Rev. A) PDF | HTML 2023/05/01
Application note ADC Input Circuit Evaluation for C2000 MCUs (using TINA-TI simulation tool) (Rev. A) PDF | HTML 2023/03/24
Application note ADC Input Circuit Evaluation for C2000 Real-Time MCUs (using PSPICE-FOR-TI) PDF | HTML 2023/03/24
Application note Charge-Sharing Driving Circuits for C2000 ADCs (using PSPICE-FOR-TI) (Rev. A) PDF | HTML 2023/03/24
Application note Charge-Sharing Driving Circuits for C2000 ADCs (using TINA-TI simulation tool) (Rev. A) PDF | HTML 2023/03/24
Application note Methods for Mitigating ADC Memory Cross-Talk (Rev. A) PDF | HTML 2023/03/24
Application note Using SMI of C2000 EtherCAT Slave Controller for Ethernet PHY Configuration PDF | HTML 2023/02/27
Application note C2000 ePWM Developer’s Guide (Rev. A) PDF | HTML 2023/02/24
Application note How to Implement Custom Serial Interfaces Using Configurable Logic Block (CLB) PDF | HTML 2023/02/03
Application note C2000 SysConfig Linker Command Tool PDF | HTML 2023/01/26
Application note Using the Fast Serial Interface (FSI) With Multiple Devices in an Application (Rev. E) PDF | HTML 2023/01/25
Application note Diagnosing Delta-Sigma Modulator Bitstream Using C2000™ Configurable Logic Block PDF | HTML 2022/12/19
User guide Getting Started With C2000™ Real-Time Control Microcontrollers (MCUs) (Rev. C) PDF | HTML 2022/06/29
Application note Implement three-phase interleaved LLC on C2000 Type-4 PWM PDF | HTML 2022/03/30
Application note The Essential Guide for Developing With C2000 Real-Time Microcontrollers (Rev. F) PDF | HTML 2022/03/03
Application note Real-Time Benchmarks Showcasing C2000™ Control MCU's Optimized Signal Chain (Rev. A) PDF | HTML 2021/12/15
Application note Achieve Delayed Protection for Three-Level Inverter With Type 4 EPWM PDF | HTML 2021/10/29
Application note C2000 SysConfig PDF | HTML 2021/10/20
Application note Getting Started with the MCAN (CAN FD) Module PDF | HTML 2021/10/20
Application note Achieve Delayed Protection for Three-Level Inverter With CLB PDF | HTML 2021/06/28
Application note Programming Examples for the DCAN Module (Rev. A) PDF | HTML 2021/05/20
Application note Leverage New Type ePWM Features for Multiple Phase Control PDF | HTML 2021/05/11
Application note CRM/ZVS PFC Implementation Based on C2000 Type-4 PWM Module PDF | HTML 2021/02/18
More literature Maximize density, power, and reliability with TI GaN and C2000™ real-time MCUs 2020/12/15
Application note C2000™ Unique Device Number (Rev. B) PDF | HTML 2020/09/17
Application note Secure BOOT On C2000 Device 2020/07/21
Application note How to Migrate Custom Logic From an FPGA/CPLD to C2000 Microcontrollers (Rev. A) 2020/06/15
Application note EtherCAT Based Connected Servo Drive using Fast Current Loop on PMSM (Rev. B) PDF | HTML 2020/02/19
White paper Distributed Power Control Architecture w/ C2000 MCUs Over Fast Serial Interface PDF | HTML 2020/02/14
E-book E-book: An engineer’s guide to industrial robot designs 2020/02/12
Application note Configurable Error Generator for Controller Area Network PDF | HTML 2019/12/19
Application note Leveraging High Resolution Capture (HRCAP) for Single Wire Data Transfer PDF | HTML 2019/08/28
Application note Fast Integer Division – A Differentiated Offering From C2000 Product Family PDF | HTML 2019/06/14
Application note Calculating Useful Lifetimes of Embedded Processors (Rev. B) PDF | HTML 2019/05/07
Application note Embedded Real-Time Analysis and Response for Control Applications PDF | HTML 2019/03/29
Application note Designing With The C2000 Configurable Logic Block 2019/02/05
Application note MSL Ratings and Reflow Profiles (Rev. A) 2018/12/13
Application note Fast Serial Interface (FSI) Skew Compensation 2018/11/08
White paper Maximizing power for Level 3 EV charging stations 2018/06/12
Application note Calculating FIT for a Mission Profile 2015/03/24

설계 및 개발

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평가 보드

F29H85X-SOM-EVM — F29H85x controlSOM 평가 모듈

F29H85X-SOM-EVM을 평가하려면 XDS110ISO-EVM 디버그 프로브를 별도로 구매해야 합니다.

HSEC180ADAPEVM 및 TMDSHSECDOCK는 controlCARD 기반 플랫폼과의 역호환성을 위해 별도로 옵션 구매할 수 있습니다.

F29H85X-SOM-EVM는 F29H85x 및 F29P58x 디바이스의 TI C2000™ MCU 시리즈를 위한 평가 및 개발 보드입니다. 이 시스템 온 모듈 설계는 초기 평가 및 프로토타이핑에 이상적입니다.

사용 설명서: PDF | HTML
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평가 보드

HSEC180ADAPEVM — SOM(System-on-Module) 기반 플랫폼을 위한 HSEC180 어댑터 보드

이 평가 모듈은 TI C2000™ 시스템 온 모듈 플랫폼용 180핀 HSEC(고속 에지 카드) 어댑터로, SOM 기반 플랫폼이 C2000 HSEC 기반 EVM과 역호환성을 가질 수 있도록 합니다. HSEC180ADAPEVM은 TMDSHSECDOCK 같은 레거시 C2000 HSEC 도킹 스테이션과 함께 사용할 수 있도록 SOM 보드에서 HSEC 핀에 180핀을 연결합니다. HSEC180ADAPEVM은 C2000 마이크로컨트롤러 SOM 플랫폼에서 EtherCAT® 기능을 평가할 수 있는 DP83826 10/100Mbps 산업용 이더넷 (...)

사용 설명서: PDF | HTML
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소프트웨어 개발 키트(SDK)

F29H85X-MCAL-SDK Microcontroller Abstraction Layer (MCAL) and Complex Device Drivers (CDD) for F29H85x

The F29x SDKs support the C29x cpu based family of real time MCUs. Together, these SDKs provide comprehensive software packages for the development of high-performance real-time control applications. The SDKs enable easy integration of host functionality together with the control, safety and (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

소프트웨어 개발 키트(SDK)

F29H85X-TIFS-SDK F29H85x foundational security software

The F29x SDKs support the C29x cpu based family of real time MCUs. Together, these SDKs provide comprehensive software packages for the development of high-performance real-time control applications. The SDKs enable easy integration of host functionality together with the control, safety and (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

IDE, 구성, 컴파일러 또는 디버거

EDGE-AI-STUDIO-MCU Edge AI Studio for Microcontrollers

Edge AI Studio is part of the CCStudio™ development tool ecosystem.  Edge AI Studio is a collection of graphical and command line tools designed to accelerate edge AI development on TI processors, microcontrollers, connectivity devices and radar sensors.  It supports both AI-accelerated (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

시작 다운로드 옵션
온라인 교육

C29X-ACADEMY C29X-ACADEMY

The C29x Academy is a great resource for developers to learn about C29-based C2000 real-time microcontrollers. The Academy delivers informational training modules as well as hands-on lab exercises that span a variety of topics.
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

소프트웨어 프로그래밍 도구

UNIFLASH UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

시작 다운로드 옵션
시뮬레이션 모델

F29H859TU-Q1 BSDL Model

SPRM872.ZIP (14 KB) - BSDL Model
설계 툴

F29-SCHEMATIC-DESIGN-TOOL Hardware schematic checklist for F29-based designs.

Hardware schematic checklist for F29-based designs.
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

패키지 CAD 기호, 풋프린트 및 3D 모델
HTQFP (PZS) 100 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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