홈 마이크로컨트롤러(MCU) 및 프로세서 Microcontrollers Automotive MCUs Automotive body & lighting MCUs
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마이크로컨트롤러(MCU) 및 프로세서
Microcontrollers
Automotive MCUs
Automotive body & lighting MCUs
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AM2612-Q1

활성

실시간 제어, 안전 및 보안 기능을 갖춘 최대 400MHz 듀얼 코어 Arm® Cortex®-R5F 기반 MCU

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AM2612-Q1

활성
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제품 상세 정보

CPU Arm Cortex-R5F Frequency (MHz) 2, 40 RAM (kByte) 1536 ADC type 3 12-bit SAR Total processing (MIPS) 0.0008 Features CAN, CAN FD, EnDat 2.2, Ethernet, External memory interface, FSI, Hardware encrpytion (AES/DES/SHA/MD5), I2C, Integrated industrial protocols, OSPI, SD/SDIO, SPI, UART UART 6 CAN (#) 2 PWM (Ch) 20 TI functional safety category Functional Safety-Compliant Number of ADC channels 21 SPI 2, 4 USB USB 2.0 Operating temperature range (°C) -40 to 150 Rating Automotive Communication interface CAN, CAN-FD, FSI, I2C, OSPI, SD/SDIO, SPI, UART Operating system AutoSAR, FreeRTOS Hardware accelerators Trigonometric math accelerator Number of GPIOs 141 Number of I2Cs 3 Security Cryptographic acceleration, Device lifecycle management, Secure boot, Secure debug, Secure provisioning Edge AI enabled Yes
CPU Arm Cortex-R5F Frequency (MHz) 2, 40 RAM (kByte) 1536 ADC type 3 12-bit SAR Total processing (MIPS) 0.0008 Features CAN, CAN FD, EnDat 2.2, Ethernet, External memory interface, FSI, Hardware encrpytion (AES/DES/SHA/MD5), I2C, Integrated industrial protocols, OSPI, SD/SDIO, SPI, UART UART 6 CAN (#) 2 PWM (Ch) 20 TI functional safety category Functional Safety-Compliant Number of ADC channels 21 SPI 2, 4 USB USB 2.0 Operating temperature range (°C) -40 to 150 Rating Automotive Communication interface CAN, CAN-FD, FSI, I2C, OSPI, SD/SDIO, SPI, UART Operating system AutoSAR, FreeRTOS Hardware accelerators Trigonometric math accelerator Number of GPIOs 141 Number of I2Cs 3 Security Cryptographic acceleration, Device lifecycle management, Secure boot, Secure debug, Secure provisioning Edge AI enabled Yes
NFBGA (ZCZ) 324 225 mm² 15 x 15

Processor Cores:

  • Single and Dual Arm Cortex R5F CPU with each core running up to 500MHz
    • 16KB I-Cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • 256KB Tightly Coupled Memory (TCM) with 32-bit ECC per core
    • Lockstep or Dual-core operation supported
  • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
    • Up to 2x, one per R5F MCU core

Memory:

  • 1.5MB of On-Chip Shared RAM (OCSRAM):
    • 3 banks × 512KB
    • ECC error protection for full 1.5MB OCSRAM

    • Remote L2 Cache (RL2) for external memory, software programmable up to 256KB per CPU core

  • 2x Octal Serial Peripheral Interface (OSPI) up to 133MHz SDR and DDR
    • 1x with eXecute In Place (XIP) support

    • RAM expansion/Flash over the Air (FOTA)

  • General-Purpose Memory Controller (GPMC)
    • 16-bit parallel data bus with 22-bit address bus and 4 chip selects
    • Up to 4MB addressable memory space
    • Integrated Error Location Module (ELM) support for error checking

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)

    • OSPI NOR and NAND Flash (50MHz SDR and 25MHz DDR) (Primary)

    • USB Peripheral boot
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
  • Timer Modules:
    • 2x Windowed Watchdog Timer (WWDT)
    • 4x Real Time Interrupt (RTI) timer

USB 2.0

  • Port configurable as USB host, USB device, or USB Dual-Role device
  • USB 2.0 Host mode
    • High-Speed (HS, 480Mbps)
    • Full-Speed (FS, 12Mbps)
    • Low-Speed (LS, 1.5Mbps)
  • USB 2.0 Device mode
    • High-Speed (HS, 480Mbps)
    • Full-Speed (FS, 12Mbps)

Industrial Connectivity:

  • 2x Programmable Real-time Unit – Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Realtime Unit Subsystem (PRU0 / PRU1) per PRU-ICSS for 4 cores total
      • Deterministic hardware
      • Dynamic firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 12KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™
      • PROFINET, IO-Link
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High Speed Interfaces

  • Integrated 3-port Gigabit Ethernet Switch (CPSW) supporting up to two external ports
    • Selectable MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine based packet classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/ UDP/ TCP checksum offload in hardware
    • Time Sensitive Network (TSN) Support
    • Cut-thru switching and Interexpress Traffic (IET) support

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 4x Serial Peripheral Interface (SPI) controllers
  • 3x Local Interconnect Network (LIN) ports
  • 3x Inter-Integrated Circuit (I2C) ports
  • 2x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 1x Fast Serial Interface Transmitter (FSITX)
  • 1x Fast Serial Interface Receiver (FSIRX)
  • Up to 141x General Purpose I/O (GPIO) pins

Sensing and Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 3x 12-bit Analog to Digital Converters (ADC) with 3 MSPS maximum sampling rate
    • Each ADC module with
      • 7x Single ended channels OR
      • 3x Differential channels
    • Highly configurable ADC digital logic
      • With selectable internal or external reference
      • 4x Post-Processing blocks for each ADC module
  • 9x Analog Comparators with internal 12-bit DAC reference (CMPSSA)
  • 1x 12 bit Digital to Analog Converter (DAC)
  • 10x Enhanced High Resolution Pulse Width Modulation (eHRPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Enhanced HRPWM time resolution
  • 8x Enhanced Capture (ECAP) modules
  • 2x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x Sigma-Delta Filter Modules (SDFM)

Data Storage

  • 1 × 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
  • Targeted for ISO 21434 compliance
  • Secure boot support
    • Device Take Over Protection
    • Hardware enforced root-of-trust
    • Authenticated boot
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after proper authentication
    • Ability to disable device debug functionality
  • Device ID and Key Management
    • Support for OTP Memory (FUSEROM)
      • Store root keys and other security fields
    • Separate EFUSE controllers and FUSE ROMs
    • Unique Device Public Identifiers
  • Memory Protection Units (MPU)
    • Dedicated Arm MPU per Cortex-R5F core
    • System MPU - present at various interfaces in the SoC (MPU or Firewall)
    • 8 to 16 Programmable Regions
      • Enable/Privilege ID
      • Start/End Address
      • Read/Write/Cachable
      • Secure/Non-Secure
  • Cryptographic acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • DRBG with pseudo and true random number generator

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM)
    • ECC or parity on calculation critical memories
    • Built-In Self-Test (BIST) on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3
    • Hardware integrity up to SIL-3
    • Safety-related certification
      • IEC 61508 certified
  • Functional Safety-Compliant [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D
    • Hardware integrity up to ASIL-D
    • Safety-related certification
      • ISO 26262 certified

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • ZCZ Package
    • 324-pin NFBGAs
    • 15.00mm × 15.00mm
    • 0.8mm pitch
  • ZFG Package
    • 304-pin NFBGA
    • 13.25mm × 13.25mm
    • 0.65mm pitch
  • ZEJ Package
    • 256-pin NFBGA
    • 13.00mm × 13.00mm
    • 0.8mm pitch
  • ZNC Package
    • 293-pin NFBGA
    • 10.00mm × 10.00mm
    • 0.5mm pitch

Processor Cores:

  • Single and Dual Arm Cortex R5F CPU with each core running up to 500MHz
    • 16KB I-Cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • 256KB Tightly Coupled Memory (TCM) with 32-bit ECC per core
    • Lockstep or Dual-core operation supported
  • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
    • Up to 2x, one per R5F MCU core

Memory:

  • 1.5MB of On-Chip Shared RAM (OCSRAM):
    • 3 banks × 512KB
    • ECC error protection for full 1.5MB OCSRAM

    • Remote L2 Cache (RL2) for external memory, software programmable up to 256KB per CPU core

  • 2x Octal Serial Peripheral Interface (OSPI) up to 133MHz SDR and DDR
    • 1x with eXecute In Place (XIP) support

    • RAM expansion/Flash over the Air (FOTA)

  • General-Purpose Memory Controller (GPMC)
    • 16-bit parallel data bus with 22-bit address bus and 4 chip selects
    • Up to 4MB addressable memory space
    • Integrated Error Location Module (ELM) support for error checking

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)

    • OSPI NOR and NAND Flash (50MHz SDR and 25MHz DDR) (Primary)

    • USB Peripheral boot
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
  • Timer Modules:
    • 2x Windowed Watchdog Timer (WWDT)
    • 4x Real Time Interrupt (RTI) timer

USB 2.0

  • Port configurable as USB host, USB device, or USB Dual-Role device
  • USB 2.0 Host mode
    • High-Speed (HS, 480Mbps)
    • Full-Speed (FS, 12Mbps)
    • Low-Speed (LS, 1.5Mbps)
  • USB 2.0 Device mode
    • High-Speed (HS, 480Mbps)
    • Full-Speed (FS, 12Mbps)

Industrial Connectivity:

  • 2x Programmable Real-time Unit – Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Realtime Unit Subsystem (PRU0 / PRU1) per PRU-ICSS for 4 cores total
      • Deterministic hardware
      • Dynamic firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 12KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™
      • PROFINET, IO-Link
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High Speed Interfaces

  • Integrated 3-port Gigabit Ethernet Switch (CPSW) supporting up to two external ports
    • Selectable MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine based packet classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/ UDP/ TCP checksum offload in hardware
    • Time Sensitive Network (TSN) Support
    • Cut-thru switching and Interexpress Traffic (IET) support

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 4x Serial Peripheral Interface (SPI) controllers
  • 3x Local Interconnect Network (LIN) ports
  • 3x Inter-Integrated Circuit (I2C) ports
  • 2x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 1x Fast Serial Interface Transmitter (FSITX)
  • 1x Fast Serial Interface Receiver (FSIRX)
  • Up to 141x General Purpose I/O (GPIO) pins

Sensing and Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 3x 12-bit Analog to Digital Converters (ADC) with 3 MSPS maximum sampling rate
    • Each ADC module with
      • 7x Single ended channels OR
      • 3x Differential channels
    • Highly configurable ADC digital logic
      • With selectable internal or external reference
      • 4x Post-Processing blocks for each ADC module
  • 9x Analog Comparators with internal 12-bit DAC reference (CMPSSA)
  • 1x 12 bit Digital to Analog Converter (DAC)
  • 10x Enhanced High Resolution Pulse Width Modulation (eHRPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Enhanced HRPWM time resolution
  • 8x Enhanced Capture (ECAP) modules
  • 2x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x Sigma-Delta Filter Modules (SDFM)

Data Storage

  • 1 × 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
  • Targeted for ISO 21434 compliance
  • Secure boot support
    • Device Take Over Protection
    • Hardware enforced root-of-trust
    • Authenticated boot
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after proper authentication
    • Ability to disable device debug functionality
  • Device ID and Key Management
    • Support for OTP Memory (FUSEROM)
      • Store root keys and other security fields
    • Separate EFUSE controllers and FUSE ROMs
    • Unique Device Public Identifiers
  • Memory Protection Units (MPU)
    • Dedicated Arm MPU per Cortex-R5F core
    • System MPU - present at various interfaces in the SoC (MPU or Firewall)
    • 8 to 16 Programmable Regions
      • Enable/Privilege ID
      • Start/End Address
      • Read/Write/Cachable
      • Secure/Non-Secure
  • Cryptographic acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • DRBG with pseudo and true random number generator

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM)
    • ECC or parity on calculation critical memories
    • Built-In Self-Test (BIST) on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3
    • Hardware integrity up to SIL-3
    • Safety-related certification
      • IEC 61508 certified
  • Functional Safety-Compliant [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D
    • Hardware integrity up to ASIL-D
    • Safety-related certification
      • ISO 26262 certified

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • ZCZ Package
    • 324-pin NFBGAs
    • 15.00mm × 15.00mm
    • 0.8mm pitch
  • ZFG Package
    • 304-pin NFBGA
    • 13.25mm × 13.25mm
    • 0.65mm pitch
  • ZEJ Package
    • 256-pin NFBGA
    • 13.00mm × 13.00mm
    • 0.8mm pitch
  • ZNC Package
    • 293-pin NFBGA
    • 10.00mm × 10.00mm
    • 0.5mm pitch

The AM261x Sitara Arm Microcontrollers are part of Sitara AM26x real-time MCU families designed to meet the complex real-time processing needs of next generation industrial and automotive embedded products. With scalable Arm Cortex R5F performance and an extensive set of peripherals, AM261x device is designed for a broad range of applications while offering safety features and optimized peripherals for real time control.

Key features and benefits:

  • Peripherals supporting system level connectivity such as Gigabit Ethernet, USB, OSPI/QSPI, CAN, UARTs, SPI and GPIOs.
  • Granular firewalls managed by Hardware Security Manager (HSM) enable developers to implement stringent security minded system design requirements.
  • Up to two R5F cores in cluster with 256KB of shared Tightly Coupled Memory (TCM) per core along with 1.5MB of shared SRAM, greatly reducing the need for external memory.

The AM261x Sitara Arm Microcontrollers are part of Sitara AM26x real-time MCU families designed to meet the complex real-time processing needs of next generation industrial and automotive embedded products. With scalable Arm Cortex R5F performance and an extensive set of peripherals, AM261x device is designed for a broad range of applications while offering safety features and optimized peripherals for real time control.

Key features and benefits:

  • Peripherals supporting system level connectivity such as Gigabit Ethernet, USB, OSPI/QSPI, CAN, UARTs, SPI and GPIOs.
  • Granular firewalls managed by Hardware Security Manager (HSM) enable developers to implement stringent security minded system design requirements.
  • Up to two R5F cores in cluster with 256KB of shared Tightly Coupled Memory (TCM) per core along with 1.5MB of shared SRAM, greatly reducing the need for external memory.
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19개 모두 보기
상위 문서 유형 직함 형식 옵션 날짜
* Data sheet AM261x Sitara™ Microcontrollers datasheet (Rev. C) PDF | HTML 2025/07/09
* Errata AM261x Errata Document (Rev. A) PDF | HTML 2025/04/29
* User guide AM261x Sitara Microcontrollers Technical Reference Manual (Rev. B) PDF | HTML 2025/07/01
* User guide AM261x Sitara Microcontrollers Register Addendum (Rev. A) 2025/04/25
Application note AM26 Ethercat SubDevice with TwinCat PDF | HTML 2025/12/10
White paper Integrating EVCC, DCDC, and Host Architecture: TI Automotive MCUs for Next-Generation EV Charging (Rev. A) PDF | HTML 2025/11/13
Application note Implementing USB True Host Detection on AM261x PDF | HTML 2025/09/30
Application note AM261x Power Estimation Tool PDF | HTML 2025/07/11
Functional safety information AM261 TÜV SÜD Functional Safety Certificate 2025/07/10
Functional safety information AM261 TÜV SÜD Functional Safety Certificate Report 2025/07/10
Product overview AM26xx Family TIFS-SDK Product Brief PDF | HTML 2025/05/29
Application note AM26x Custom PCB System Getting Started Guide (Rev. A) PDF | HTML 2025/05/13
White paper AM261x 和 AM263Px 使用的工业通信协议 PDF | HTML 2025/05/12
User guide AM26x Hardware Design Guidelines (Rev. D) PDF | HTML 2025/05/02
Application note How to Synchronize the Timing Between Chips With Programmable Real-Time Unit PDF | HTML 2025/03/10
Application note Microcontroller Abstraction Layer on Jacinto™ and Sitara™ Embedded Processors PDF | HTML 2025/01/28
Application note AM26x Family Migration Overview (Rev. A) PDF | HTML 2024/11/15
Application brief Achieving Faster Secure Boot Time on AM26x Devices PDF | HTML 2024/11/13
User guide AM261x OSPI, QSPI Flash Selection Guide PDF | HTML 2024/09/19

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

AM261-SOM-EVM — AM261x 제어 시스템 온 모듈(SOM) 평가 모듈

AM261-SOM-EVM은 텍사스 인스트루먼트 Sitara™ AM261x 마이크로컨트롤러(MCU) 시리즈용 평가 및 개발 보드입니다. 120핀 고속, 고밀도 커넥터 3개를 갖춘 시스템 온 모듈 설계는 초기 평가와 신속한 프로토타이핑에 이상적입니다. AM261-SOM-EVM을 사용한 평가 시 XDS110ISOEVM이 필요하고 AM261-SOM-EVM과 함께 번들 구매 또는 단독 구매가 가능합니다.
사용 설명서: PDF | HTML
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DP83TG720-EVM-AM2는 AM2x 시리즈 Sitara™ 고성능 마이크로컨트롤러 평가 모듈과 함께 사용되는 차량용 이더넷 PHY 애드온 보드입니다. 이 애드온 보드는 AM2x EVM을 사용한 초기 이더넷 평가 및 프로토타이핑에 이상적입니다. DP83TG720-EVM-AM2에는 RGMII 및 SGMII를 지원하는 TI DP83TG720S-Q1 1000BASE-T1 차량용 이더넷 PHY, MATENet 커넥터가 장착되어 있습니다. DP83TG720-EVM-AM2는 현재 TMDSCNCD263P 및 AM263Px MCU Plus (...)

사용 설명서: PDF | HTML
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평가 보드

LP-AM261 — AM261x Arm® 기반 MCU 범용 LaunchPad™ 개발 키트

AM261x LaunchPad™ 개발 키트는 Texas Instruments™ Sitara™ AM261x 시리즈 MCU(마이크로컨트롤러)를 위한 간단하고 경제적인 하드웨어 평가 모듈(EVM)입니다. 이 EVM은 프로그래밍 및 디버깅을 위한 온 보드 에뮬레이션과 간단한 사용자 인터페이스를 위한 사용자 제어 버튼 및 LED를 제공하여 AM261x MCU에서의 개발을 쉽게 시작할 수 있는 방법을 제공합니다.
사용 설명서: PDF | HTML
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디버그 프로브

TMDSEMU110-U — XDS110 JTAG 디버그 프로브

텍사스 인스트루먼트 XDS110은 TI 임베디드 프로세서를 위한 새로운 디버그 프로브(에뮬레이터)입니다. XDS110은 XDS100 제품군을 대체하면서 하나의 포드로 더 다양한 표준(IEEE1149.1, IEEE1149.7, SWD)을지원합니다. 또한 모든 XDS 디버그 프로브는 ETB(Embedded Trace Buffer)가 포함되어 있는 모든 Arm® 및 DSP 프로세서에서 코어(Core) 및 시스템 트레이스(System Trace)를 지원합니다.  핀을 통한 코어 추적의 경우 XDS560v2 PRO TRACE가 필요합니다.

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사용 설명서: PDF
Download English Version: PDF
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디버그 프로브

TMDSEMU560V2STM-U — XDS560v2 시스템 추적 USB 디버그 프로브

XDS560v2는 디버그 프로브의 XDS560™ 제품군 중 최고의 성능을 가진 제품으로, 기존의 JTAG 표준(IEEE1149.1)과 cJTAG(IEEE1149.7)를 모두 지원합니다. SWD(직렬 와이어 디버그)는 지원하지 않습니다.

모든 XDS 디버그 프로브는 ETB(Embedded Trace Buffer)를 특징으로 하는 모든 ARM 및 DSP 프로세서에서 코어 및 시스템 추적을 지원합니다. 핀을 통한 추적의 경우 XDS560v2 PRO TRACE가 필요합니다.

XDS560v2는 MIPI HSPT 60핀 커넥터(TI 14핀, (...)

TI.com에서 구매할 수 없음
디버그 프로브

TMDSEMU560V2STM-UE — XDS560v2 시스템 추적 USB 및 이더넷 디버그 프로브

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

TI.com에서 구매할 수 없음
디버그 프로브

LB-3P-TRACE32-ARM — Arm® 기반 마이크로컨트롤러 및 프로세서용 Lauterbach TRACE32® 디버그 및 트레이스 시스템

Lauterbach의 TRACE32® 툴은 개발자가 모든 종류의 Arm® 기반 마이크로컨트롤러 및 프로세서를 분석, 최적화 및 인증할 수 있도록 하는 첨단 하드웨어 및 소프트웨어 구성 요소 제품군입니다. 세계적으로 유명한 임베디드 시스템 및 SoC용 디버그 및 트레이스 솔루션은 초기 사전 실리콘 개발부터 현장의 제품 인증 및 문제 해결에 이르기까지 모든 개발 단계를 위한 완벽한 솔루션입니다. Lauterbach 툴의 직관적인 모듈형 설계는 엔지니어에게 현존하는 최고의 성능을 제공하고 요구 사항 변화에 따라 적응하고 성장하는 (...)

발송: Lauterbach GmbH
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소프트웨어 개발 키트(SDK)

AM261X-MCAL-SDK — Microcontroller Abstraction Layer (MCAL) and Complex Device Drivers (CDD) for AM261X

The AM261x microcontroller (MCU) plus software development kit (SDK) is a unified software platform for embedded processors providing easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development schedules by eliminating (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
요청
소프트웨어 개발 키트(SDK)

AM261X-TIFS-SDK — AM261x foundational security software

The AM261x microcontroller (MCU) plus software development kit (SDK) is a unified software platform for embedded processors providing easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development schedules by eliminating (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
요청
소프트웨어 개발 키트(SDK)

MCU-PLUS-SDK-AM261X — MCU+ SDK for AM261x - RTOS, No-RTOS

The AM261x microcontroller (MCU) plus software development kit (SDK) is a unified software platform for embedded processors providing easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development schedules by eliminating (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
찾아보기 다운로드 옵션
애플리케이션 소프트웨어 및 프레임워크

AM261X-RESTRICTED-SAFETY — AM261x restricted functional safety content

AM261x restricted functional safety content
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
요청
IDE, 구성, 컴파일러 또는 디버거

CCSTUDIO — Code Composer Studio integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development tool ecosystem. It is an integrated development environment (IDE) for TI's microcontrollers, processors, wireless connectivity devices and radar sensors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
시작 다운로드 옵션
IDE, 구성, 컴파일러 또는 디버거

SYSCONFIG — Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
시작 다운로드 옵션
온라인 교육

AM26X-ACADEMY — AM26x Academy

AM26x Academy features easy-to-use training modules ranging from the basics of getting started to advanced development topics.
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
찾아보기
계산 툴

AM261X-PET-CALC — AM261x Power Estimation Tool

Power Estimation Tool for AM261x Family of Devices. This tool can be used to provide a general estimate of the expected device power consumption for common applications.
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
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  • MSL 등급/피크 리플로우
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