SPRUIN7C March 2020 – March 2024 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1
Write accesses from the CPU can be protected by setting the CPUWRPROTx bit of the specific register to ‘1.’ If write access is done by a CPU to memory where it is protected, a write protection violation occurs.
If a write protection violation occurs, the write gets ignored, a flag gets set in the appropriate access violation flag register, and the memory address for which the access violation occurred, gets latched into the appropriate CPU write access violation address register. Also, an access violation interrupt is generated if enabled in the interrupt enable register.