SPRUIN7C March 2020 – March 2024 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1
The M field of the BRSR register modifies the integer prescaler P for fine tuning of the baud rate. The M value adds in increments of 1/16 of the P value.
The bit time, Tbit is expressed in terms of the VCLK period TVCLK as follows:
For all P other than 0, and all M,
For P= 0 : Tbit = 32TVCLK
Therefore, the LINCLK frequency is given by: