SPRUJ28C november 2021 – june 2023 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
A transfer ERROR occurs anytime that one of the CBA transactions performed by the UTC returns a status other than complete. The UTC may continue the transfer or may abort the transfer and return back to an IDLE state. Once the transfer is finished (aborted or complete) the UTC will send back the TR Response with the STATUS TYPE of Transfer Error. The STATUS FIELD will contain the 3 bit CBA Status field the upper bit specifies if it was a read status (1) or a write status (0).