PLLATINUMSIM-SW — PLLatinum Sim Tool
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
The LMX8410L is a high-performance wideband (RF frequency input from 4 to 10 GHz) I/Q demodulator with an integrated LO and IF amplifier. With IIP3 of 28 dBm and NF of 15 dB (both at 5GHz), it provides excellent dynamic range for high performance applications. The device offers large complex bandwidth of 2.7 GHz for high data-rate applications.
The LMX8410L offers an automatic DC offset correction algorithm that reduces the offset to less than ±2 mV. Fine control of gain and phase of I and Q channels is enabled using SPI interface to achieve high image rejection.
The LMX8410L has a high level of integration providing high performance while saving board space and complexity. It integrates a wideband RF input balun, eliminating the need for external baluns. It integrates a high-performance PLL and VCO, eliminating the need for external LO and LO driver. The device also integrates an IF amplifier and several low noise LDOs, further simplifying the board.
The LMX8410L integrates a very low-noise synthesizer, with a PLL FOM of –236 dBc/Hz, providing up to 56.5-dBc DSB integrated noise at 5 GHz carrier. The LO allows for phase synchronization across multiple devices. The high-performance synthesizer output can be brought out to drive another stage or a data converter. The integrated LO can be bypassed for applications that share a common external LO.
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | LMX8410L High-Performance Mixer With Integrated Synthesizer datasheet (Rev. A) | PDF | HTML | 2018年 11月 14日 |
| Application note | Designing a High Performance 4-12GHz Direct Conversion Receiver with LMX8410L | 2019年 2月 18日 | ||
| EVM User's guide | LMX8410LEVM User's Guide (Rev. A) | 2018年 11月 27日 | ||
| Technical article | Can a clock generator act as a jitter cleaner? | PDF | HTML | 2017年 3月 23日 | |
| Technical article | Don’t let bad reference signals destroy the phase noise in your PLL/synthesizer | PDF | HTML | 2017年 1月 10日 | |
| Technical article | A survival guide to scaling your PLL loop filter design | PDF | HTML | 2016年 11月 22日 | |
| Technical article | What to do when your PLL does not lock | PDF | HTML | 2016年 7月 12日 | |
| Technical article | Issues with jitter, phase noise, lock time or spurs? Check the loop-filter bandwid | PDF | HTML | 2016年 6月 6日 |
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PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGZ) | 48 | Ultra Librarian |
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。
Bug fixes