LMK03033

現行

產品詳細資料

Number of outputs 9 Output type LVDS Output frequency (max) (MHz) 1296 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVPECL Operating temperature range (°C) -40 to 85 Features Integrated VCO, uWire Rating Catalog
Number of outputs 9 Output type LVDS Output frequency (max) (MHz) 1296 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVPECL Operating temperature range (°C) -40 to 85 Features Integrated VCO, uWire Rating Catalog
WQFN (RHS) 48 49 mm² (7 mm × 7 mm)
  • Integrated VCO with Very Low Phase Noise Floor
  • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz
  • VCO Divider Values of 2 to 8 (All Divides)
  • Channel Divider Values of 1, 2 to 510 (even divides)
  • LVDS and LVPECL Clock Outputs
  • Partially Integrated Loop Filter
  • Dedicated Divider and Delay Blocks on Each Clock Output
  • Pin Compatible Family of Clocking Devices
  • 3.15 to 3.45 V Operation
  • Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)
  • 200 fs RMS Clock Generator Performance (10 Hz to 20 MHz) with a Clean Input Clock

All trademarks are the property of their respective owners.

  • Integrated VCO with Very Low Phase Noise Floor
  • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz
  • VCO Divider Values of 2 to 8 (All Divides)
  • Channel Divider Values of 1, 2 to 510 (even divides)
  • LVDS and LVPECL Clock Outputs
  • Partially Integrated Loop Filter
  • Dedicated Divider and Delay Blocks on Each Clock Output
  • Pin Compatible Family of Clocking Devices
  • 3.15 to 3.45 V Operation
  • Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)
  • 200 fs RMS Clock Generator Performance (10 Hz to 20 MHz) with a Clean Input Clock

All trademarks are the property of their respective owners.

The LMK03000 family of precision clock conditioners combine the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The devices integrate a Voltage Controlled Oscillator (VCO), a high performance Integer-N Phase Locked Loop (PLL), a partially integrated loop filter, and up to eight outputs in various LVDS and LVPECL combinations.

The VCO output is optionally accessible on the Fout port. Internally, the VCO output goes through a VCO Divider to feed the various clock distribution blocks.

Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.

The clock conditioners come in a 48-pin WQFN package and are footprint compatible with other clocking devices in the same family.



The LMK03000 family of precision clock conditioners combine the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The devices integrate a Voltage Controlled Oscillator (VCO), a high performance Integer-N Phase Locked Loop (PLL), a partially integrated loop filter, and up to eight outputs in various LVDS and LVPECL combinations.

The VCO output is optionally accessible on the Fout port. Internally, the VCO output goes through a VCO Divider to feed the various clock distribution blocks.

Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.

The clock conditioners come in a 48-pin WQFN package and are footprint compatible with other clocking devices in the same family.



下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
功能相似於所比較的產品。
LMK02000 現行 具整合式 PLL 和 3 LVDS / 5 LVPECL 輸出的 1 至 800MHz 精密時脈分配器 Includes PLL For Use With External VCO/VCXO.
LMK03200 現行 具整合式 VCO 的精密 0 延遲時脈調節器 0-delay Outputs With PLL+VCO For Jitter Cleaning And Clock Generation
LMK01000 現行 具 3 個 LVDS 和 5 個 LVPECL 輸出的 1.6-GHz 高性能時脈緩衝器、分頻器和分配器 Distribution, Divide, And Delay Only

技術文件

找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 2
重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 LMK03000 Family Precision Clock Conditioner with Integrated VCO datasheet (Rev. O) 2013/3/15
設計指南 Clock Conditioner Owner's Manual 2006/11/10

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

LMK03033CEVAL — 具有整合式 VCO 的精密時鐘調節器 (1843 - 2160 MHz)

The LMK03033C Evaluation Board simplifies evaluation of the LMK03033C Precision Clock Conditioner with Integrated VCO. The package consists of an Evaluation Board, Evaluation Board Instructions, and a cable for programming the device through a PC parallel port. Code-Loader is the software used to (...)

使用指南: PDF
支援產品和硬體
有庫存
限制:
??asset.out-of-stock-ti_zh_TW??
無法提供
軟體程式設計工具

CODELOADER — CodeLoader Device Register Programming v4.19.0

The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.

Which software do I use?

Product

(...)

支援產品和硬體
支援軟體

CLOCKDESIGNTOOL — Clock Design Tool Software

時脈設計工具軟體可協助進行零件選擇、迴路濾波器設計,以及計時裝置解決方案模擬。當您輸入所需的輸出頻率和參考頻率 (選用) 時,此工具可提供符合指定需求、分頻器值和建議迴路濾波器的 TI 裝置,以將抖動降到最低。

CLOCKDESIGNTOOL 教學影片

我應該使用哪個軟體?

產品

迴路濾波器和裝置配置 + 模擬

模擬工具

裝置暫存器程式化

LMX24xx PLL 系列

EasyPLL

時脈系統架構

CodeLoader

LMX25xx PLL+VCO 系列

時脈設計工具

LMK 抖動清除器及分配器

支援產品和硬體
設計工具

CLOCK-TREE-ARCHITECT — 時鐘樹架構程式設計軟體

時鐘樹架構是一款時鐘樹合成工具,可根據您的系統需求產生時鐘樹解決方案,進而簡化您的設計流程。此工具可從廣泛的計時產品資料庫中汲取資料,產生系統級多晶片計時解決方案。

支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (RHS) 48 Ultra Librarian

訂購與品質

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片