The ADS54J40 is a low-power, wide-bandwidth, 14-bit, 1.0-GSPS, dual-channel, analog-to-digital converter (ADC). Designed for high signal-to-noise ratio (SNR), the device delivers a noise floor of –158 dBFS/Hz for applications aiming for highest dynamic range over a wide instantaneous bandwidth. The device supports the JESD204B serial interface with data rates up to 10.0 Gbps, supporting two or four lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. Each ADC channel optionally can be connected to a wideband digital down-converter (DDC) block. The ADS54J40 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption.
The JESD204B interface reduces the number of interface lines, allowing high system integration density. An internal phase-locked loop (PLL) multiplies the ADC sampling clock to derive the bit clock that is used to serialize the 14-bit data from each channel.
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| Top-Dokumentation | Typ | Titel | Format-Optionen | Datum |
|---|---|---|---|---|
| * | Data sheet | ADS54J40 Dual-Channel, 14-Bit, 1.0-GSPS Analog-to-Digital Converter datasheet (Rev. C) | 09 Jan 2018 |
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Das ADS54J40EVM ist ein Evaluierungsmodul (EVM), welches die Evaluierung der Takt-Jitter-Cleaner ADS54J40 und LMK04828 von Texas Instruments ermöglicht. Der ADS54J40 ist ein energieeffizienter 14-Bit-Analog-Digital-Wandler (ADC) mit 1 GSPS sowie gepufferten Analogeingängen und -Ausgängen mit einer (...)
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| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| VQFNP (RMP) | 72 | Ultra Librarian |
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Analog Engineer's Calc Installer
General calculator tool for analog design support.
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