Produktdetails

Resolution (Bits) 24 Sample rate (max) (ksps) 30 Number of input channels 4 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 5.25 Input voltage range (min) (V) 0 Features 50/60 Hz Rejection, GPIO, PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 38 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.25 Digital supply (min) (V) 1.8 Digital supply (max) (V) 3.6
Resolution (Bits) 24 Sample rate (max) (ksps) 30 Number of input channels 4 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 5.25 Input voltage range (min) (V) 0 Features 50/60 Hz Rejection, GPIO, PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 38 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.25 Digital supply (min) (V) 1.8 Digital supply (max) (V) 3.6
VQFN (RGW) 20 25 mm² 5 x 5
  • Up to 23-Bits Noise-Free Resolution
  • Small 5-mm × 5-mm VQFN Package
  • 4 Analog Inputs
    • 2 Differential or 3 Single-Ended Measurements
  • Excellent DC Performance
    • Offset Drift: 4 nV/°C (Gain = 64)
    • Gain Drift: 0.8 ppm/°C
    • Nonlinearity: 3 ppm (Gain = 1)
  • Programmable Data Rates: 2.5 SPS to 30 kSPS
  • Single-Cycle Settled Conversions (≤ 1000 SPS)
  • 50-Hz and 60-Hz Rejection
  • High Impedance Input Buffer
  • Differential-Input PGA
  • Integrated Sensor Break Detection
  • 2 General-Purpose Input/Outputs
  • Power Supplies:
    • Analog: 5 V
    • Digital: 1.8 V to 3.6 V
  • 5-V Tolerant SPI™-Compatible Serial Interface
  • Up to 23-Bits Noise-Free Resolution
  • Small 5-mm × 5-mm VQFN Package
  • 4 Analog Inputs
    • 2 Differential or 3 Single-Ended Measurements
  • Excellent DC Performance
    • Offset Drift: 4 nV/°C (Gain = 64)
    • Gain Drift: 0.8 ppm/°C
    • Nonlinearity: 3 ppm (Gain = 1)
  • Programmable Data Rates: 2.5 SPS to 30 kSPS
  • Single-Cycle Settled Conversions (≤ 1000 SPS)
  • 50-Hz and 60-Hz Rejection
  • High Impedance Input Buffer
  • Differential-Input PGA
  • Integrated Sensor Break Detection
  • 2 General-Purpose Input/Outputs
  • Power Supplies:
    • Analog: 5 V
    • Digital: 1.8 V to 3.6 V
  • 5-V Tolerant SPI™-Compatible Serial Interface

The ADS1257 is a low-noise, 30-kSPS, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC) with an integrated multiplexer (mux), input buffer, and programmable gain amplifier (PGA) in a small 20-pin, 5-mm × 5-mm VQFN package. The combination of integration, high conversion rate, and 24-bit resolution together in a small package makes the device ideally suited for space-constrained applications.

The input multiplexer accepts either two differential or three single-ended input measurements. The sensor-break detection circuit verifies the input connection continuity to the ADC. The selectable input buffer greatly increases the input impedance, and in many cases, eliminates the need for external buffers. The buffer input voltage range includes AGND. The low-noise PGA provides gains from 1 to 64 to accommodate a wide range of inputs signals. The programmable digital filter optimizes ADC resolution (up to 23 bits noise-free) and conversion rates (up to 30 kSPS). The digital filter provides single-cycle settled conversions, and rejection of 50-Hz and 60-Hz interference signals.

The SPI-compatible serial interface operates with as little as three wires, simplifying connections to external controllers. Integrated calibration features support both self and system correction of offset and gain errors for all PGA gain settings. Two bidirectional digital I/Os pins control external circuits.

The ADS1257 is a low-noise, 30-kSPS, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC) with an integrated multiplexer (mux), input buffer, and programmable gain amplifier (PGA) in a small 20-pin, 5-mm × 5-mm VQFN package. The combination of integration, high conversion rate, and 24-bit resolution together in a small package makes the device ideally suited for space-constrained applications.

The input multiplexer accepts either two differential or three single-ended input measurements. The sensor-break detection circuit verifies the input connection continuity to the ADC. The selectable input buffer greatly increases the input impedance, and in many cases, eliminates the need for external buffers. The buffer input voltage range includes AGND. The low-noise PGA provides gains from 1 to 64 to accommodate a wide range of inputs signals. The programmable digital filter optimizes ADC resolution (up to 23 bits noise-free) and conversion rates (up to 30 kSPS). The digital filter provides single-cycle settled conversions, and rejection of 50-Hz and 60-Hz interference signals.

The SPI-compatible serial interface operates with as little as three wires, simplifying connections to external controllers. Integrated calibration features support both self and system correction of offset and gain errors for all PGA gain settings. Two bidirectional digital I/Os pins control external circuits.

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Technische Dokumentation

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* Data sheet ADS1257 30-kSPS, 4-Channel, 24-Bit ADC with PGA in 5-mm × 5-mm VQFN Package datasheet (Rev. B) PDF | HTML 19 Apr 2016
Application note Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) PDF | HTML 18 Mär 2024
Application note A Basic Guide to Bridge Measurements (Rev. A) PDF | HTML 13 Mär 2024
Application note QFN and SON PCB Attachment (Rev. C) PDF | HTML 06 Dez 2023
Application note Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 29 Mär 2023
E-book Fundamentals of Precision ADC Noise Analysis (Rev. A) 19 Jun 2020

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