Produktdetails

Resolution (Bits) 16 Sample rate (max) (ksps) 250 Number of input channels 6 Interface type Byte-Wide, Parallel Architecture SAR Input type Pseudo-Differential Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 2.6 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 190 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.25 SNR (dB) 88 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.5
Resolution (Bits) 16 Sample rate (max) (ksps) 250 Number of input channels 6 Interface type Byte-Wide, Parallel Architecture SAR Input type Pseudo-Differential Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 2.6 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 190 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.25 SNR (dB) 88 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.5
TQFP (PAG) 64 144 mm² 12 x 12
  • Six Input Channels
  • Fully Differential Inputs
  • Six Independent 16-Bit ADCs
  • 4µs Total Throughput per Channel
  • Low Power:
    200mW in Normal Mode
    5mW in Nap Mode
    50µW in Power-Down Mode
  • TQFP-64 Package Package
  • APPLICATIONS
    • Motor Control
    • Multi-Axis Positioning Systems
    • 3-Phase Power Control

All trademarks are the property of their respective owners.

  • Six Input Channels
  • Fully Differential Inputs
  • Six Independent 16-Bit ADCs
  • 4µs Total Throughput per Channel
  • Low Power:
    200mW in Normal Mode
    5mW in Nap Mode
    50µW in Power-Down Mode
  • TQFP-64 Package Package
  • APPLICATIONS
    • Motor Control
    • Multi-Axis Positioning Systems
    • 3-Phase Power Control

All trademarks are the property of their respective owners.

The ADS8365 includes six, 16-bit, 250kSPS analog-to-digital converters (ADCs) with six fully differential input channels grouped into three pairs for high-speed simultaneous signal acquisition. Inputs to the sample-and-hold amplifiers are fully differential and are maintained differential to the input of the ADC. This architecture provides excellent common-mode rejection of 80dB at 50kHz, which is important in high-noise environments.

The ADS8365 offers a flexible, high-speed parallel interface with a direct address mode, a cycle, and a FIFO mode. The output data for each channel is available as a 16-bit word.

The ADS8365 includes six, 16-bit, 250kSPS analog-to-digital converters (ADCs) with six fully differential input channels grouped into three pairs for high-speed simultaneous signal acquisition. Inputs to the sample-and-hold amplifiers are fully differential and are maintained differential to the input of the ADC. This architecture provides excellent common-mode rejection of 80dB at 50kHz, which is important in high-noise environments.

The ADS8365 offers a flexible, high-speed parallel interface with a direct address mode, a cycle, and a FIFO mode. The output data for each channel is available as a 16-bit word.

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet 16-Bit, 250kSPS 6-Channel Simultaneous Sampling SAR Analog-to-Digital Converters datasheet (Rev. C) 27 Mär 2008
White paper Voltage-reference impact on total harmonic distortion 01 Aug 2016
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 21 Mai 2015
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 17 Mär 2011
Application note Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) 10 Nov 2010
More literature ADS8365EVM Readme Page Thank You Letter (Rev. A) 05 Dez 2006

Design und Entwicklung

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Evaluierungsplatine

ADS8365M-EVM — ADS8365M-Evaluierungsmodul

The ADS8365M-EVM is designed for the prototyping and evaluation of the ADS8365 analog-to-digital converter (ADC). This high-resolution, 16 bit, parallel analog-to-digital, 250 kHz, SAR device, can be configured as a single or fully differential, pseudo-bipolar input. The EVM uses a (...)

Benutzerhandbuch: PDF
Simulationsmodell

ADS8365 IBIS Model

SBAM147.ZIP (51 KB) - IBIS Model
Berechnungstool

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JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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Bestellen & Qualität

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