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Digital-Analog-Wandler (DACs)
Highspeed-DACs (> 10 MSPSS)

DAC3482

AKTIV

Zweikanaliger Digital-Analog-Wandler (DAC), 16 Bit, 1,25 GSPS, 1–16x interpolierend

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Datenblatt

DAC3482

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Resolution (Bits) 16 Number of DAC channels 2 Interface type Parallel LVDS Sample/update rate (Msps) 1250 Features Ultra High Speed Rating Catalog Interpolation 16x, 1x, 2x, 4x, 8x Power consumption (typ) (mW) 800 SFDR (dB) 82 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Int
Resolution (Bits) 16 Number of DAC channels 2 Interface type Parallel LVDS Sample/update rate (Msps) 1250 Features Ultra High Speed Rating Catalog Interpolation 16x, 1x, 2x, 4x, 8x Power consumption (typ) (mW) 800 SFDR (dB) 82 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Int
NFBGA (ZAY) 196 144 mm² 12 x 12 WQFN-MR (RKD) 88 81 mm² 9 x 9
  • Very low power: 900mW at 1.25GSPS, full operating conditions
  • Multi-DAC synchronization
  • Selectable 2x, 4x, 8x, 16x interpolation filter
    • Stop-band attenuation > 90dBc
  • Flexible on-chip complex mixing
    • Fine mixer with 32-bit NCO
    • Power saving coarse mixer: ± n×Fs/8
  • High performance, low jitter clock multiplying PLL
  • Digital I and Q correction
    • Gain, phase, offset, and group delay correction
  • Digital inverse sinc filter
  • Flexible LVDS input data bus
    • Word- or byte-wide interface
    • 8 Sample input FIFO
    • Data pattern checker
    • Parity check
  • Temperature sensor
  • Differential scalable output: 10mA to 30mA
  • Multiple package options: 88 Pin 9 x 9mm WQFN-MR and 196-ball 12mm x12mm
  • Very low power: 900mW at 1.25GSPS, full operating conditions
  • Multi-DAC synchronization
  • Selectable 2x, 4x, 8x, 16x interpolation filter
    • Stop-band attenuation > 90dBc
  • Flexible on-chip complex mixing
    • Fine mixer with 32-bit NCO
    • Power saving coarse mixer: ± n×Fs/8
  • High performance, low jitter clock multiplying PLL
  • Digital I and Q correction
    • Gain, phase, offset, and group delay correction
  • Digital inverse sinc filter
  • Flexible LVDS input data bus
    • Word- or byte-wide interface
    • 8 Sample input FIFO
    • Data pattern checker
    • Parity check
  • Temperature sensor
  • Differential scalable output: 10mA to 30mA
  • Multiple package options: 88 Pin 9 x 9mm WQFN-MR and 196-ball 12mm x12mm

The DAC3482 is a very low power, high dynamic range, dual-channel, 16-bit digital-to-analog converter (DAC) with a sample rate as high as 1.25GSPS.

The device includes features that simplify the design of complex transmit architectures: 2x to 16x digital interpolation filters with over 90dB of stop-band attenuation simplify the data interface and reconstruction filters. A complex mixer allows flexible carrier placement. A high-performance low jitter clock multiplier simplifies clocking of the device without significant impact on the dynamic range. The digital Quadrature Modulator Correction (QMC) enables complete IQ compensation for gain, offset, phase, and group delay between channels in direct up-conversion applications.

Digital data is input to the device through a flexible LVDS data bus with on-chip termination. Data can be input either word-wide or byte-wide. The device includes a FIFO, data pattern checker and parity test to ease the input interface. The interface also allows full synchronization of multiple devices.

The device is characterized for operation over the entire industrial temperature range of –40°C to 85°C and is available in a small 88 pin 9 x 9mm WQFN-MR package or 196-ball 12 x12mm NFBGA package.

Low power, small size, superior crosstalk, high dynamic range, and features of the DAC3482 make it an ideal fit for today’s communication systems.

The DAC3482 is a very low power, high dynamic range, dual-channel, 16-bit digital-to-analog converter (DAC) with a sample rate as high as 1.25GSPS.

The device includes features that simplify the design of complex transmit architectures: 2x to 16x digital interpolation filters with over 90dB of stop-band attenuation simplify the data interface and reconstruction filters. A complex mixer allows flexible carrier placement. A high-performance low jitter clock multiplier simplifies clocking of the device without significant impact on the dynamic range. The digital Quadrature Modulator Correction (QMC) enables complete IQ compensation for gain, offset, phase, and group delay between channels in direct up-conversion applications.

Digital data is input to the device through a flexible LVDS data bus with on-chip termination. Data can be input either word-wide or byte-wide. The device includes a FIFO, data pattern checker and parity test to ease the input interface. The interface also allows full synchronization of multiple devices.

The device is characterized for operation over the entire industrial temperature range of –40°C to 85°C and is available in a small 88 pin 9 x 9mm WQFN-MR package or 196-ball 12 x12mm NFBGA package.

Low power, small size, superior crosstalk, high dynamic range, and features of the DAC3482 make it an ideal fit for today’s communication systems.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet DAC3482, Dual-Channel, 16-Bit, 1.25GSPS Digital-to-Analog Converter (DAC) datasheet (Rev. G) PDF | HTML 18 Jan 2024
Application note QFN and SON PCB Attachment (Rev. C) PDF | HTML 06 Dez 2023
Application note Effects of Clock Spur on High Speed DAC Performance (Rev. A) 18 Mai 2015
Design guide TSW308x Wideband Digital to RF Transmit Solution Design Guide 03 Sep 2013
Design guide Analog Interfacing Networks for DAC348x and Modulators (TIDA-00077) (Rev. A) 14 Aug 2013
Application note Using DAC348x with Fault Detection and Auto Output Shut-off Feature 21 Feb 2013
Application note DAC348x Device Configuration and Synchronization 18 Feb 2013
Application note Effects of Clock Noise on High Speed DAC Performance 08 Nov 2012
Application note High Speed, Digital-to-Analog Converters Basics (Rev. A) 23 Okt 2012
Application note Design Summary Multi-row Quad Flat No-lead (MRQFN) 29 Aug 2012
User guide Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) 10 Jul 2012
User guide TSW1400 Pattern Generators 03 Mai 2012
Application note Configuring and Optimizing On-Chip PLL of the DAC348x 26 Jan 2012
User guide TSW3085EVM ACPR and EVM Measurements (TIDA-00076 Reference Guide) 29 Dez 2011

Design und Entwicklung

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Benutzerhandbuch: PDF
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GUI für Evaluierungsmodul (EVM)

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Simulationsmodell

DAC3482 IBIS Model (Rev. A)

SLAM073A.ZIP (33 KB) - IBIS Model
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Simulationsmodell

TINA-TI SPICE Models: Analog Interfacing Networks for DAC348x and Modulators

SLUC481.ZIP (198 KB) - TINA-TI Spice Model
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Schaltplan

TSW3085EVM Design Package Board rev B

SLAR058.ZIP (4917 KB)
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TSW3100 Design Package

SLLC424.ZIP (15830 KB)
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Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

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Referenzdesigns

TIDA-00077 — Analoge Schnittstellennetzwerke für DAC348x und Modulatoren

The analog interface circuits in this reference design are often used between current-source based digital-to analog converters (DAC) and quadrature modulators. While the DAC348x is used as an example of a TI high-speed DAC, the circuits can be applied to other current-source based converters with (...)
Design guide: PDF
Schaltplan: PDF
Referenzdesigns

TIDA-00076 — Messen von ACPR (Adjacent Channel Power Ratio, Nachbarkanalleistung) und Error Vector Magnitude (%EV

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Referenzdesigns

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
NFBGA (ZAY) 196 Ultra Librarian
WQFN-MR (RKD) 88 Ultra Librarian
Es gelten die allgemeinen Geschäftsbedingungen von TI für Evaluierungsartikel.

Bestellen & Qualität

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  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
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