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Analog-Digital-Wandler (ADCs)
Highspeed-ADCs (≥ 10 MSPS)

ADS5271

AKTIV

Achtkanaliger Analog-zu-Digital-Wandler (ADC), 12 Bit, 50 MSPS

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ADS5271

AKTIV
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Produktdetails

Sample rate (max) (Msps) 50 Resolution (Bits) 12 Number of input channels 8 Interface type Parallel LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 957 Architecture Pipeline SNR (dB) 70.5 ENOB (Bits) 11.3 SFDR (dB) 87 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 50 Resolution (Bits) 12 Number of input channels 8 Interface type Parallel LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 957 Architecture Pipeline SNR (dB) 70.5 ENOB (Bits) 11.3 SFDR (dB) 87 Operating temperature range (°C) -40 to 85 Input buffer No
HTQFP (PFP) 80 196 mm² 14 x 14
  • Maximum Sample Rate: 50MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation:
    Internal Reference: 927mW
    External Reference: 861mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 70.5dB SNR at 10MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • TQFP-80 PowerPAD Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Tape Drives
    • Test Equipment
    • Optical Networking

PowerPAD Is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners
  • Maximum Sample Rate: 50MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation:
    Internal Reference: 927mW
    External Reference: 861mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 70.5dB SNR at 10MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • TQFP-80 PowerPAD Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Tape Drives
    • Test Equipment
    • Optical Networking

PowerPAD Is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners

The ADS5271 is a high-performance, 50MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5271 provides internal references, or can optionally be driven with external references. Best performance is achieved through the internal reference mode.

The device is available in a TQFP-80 PowerPAD package and is specified over a -40°C to +85°C operating range.

The ADS5271 is a high-performance, 50MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5271 provides internal references, or can optionally be driven with external references. Best performance is achieved through the internal reference mode.

The device is available in a TQFP-80 PowerPAD package and is specified over a -40°C to +85°C operating range.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet 8-Channel, 12-Bit, 50MSPS Analog-to-Digital Converter with Serial LVDS Interface datasheet (Rev. C) 06 Jan 2009
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 Mai 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 Jul 2013
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28 Apr 2009
Application note CDCE62005 as Clock Solution for High-Speed ADCs 04 Sep 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 Jun 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 Jun 2008
Application note Interfacing the VCA8613 with High-Speed ADCs 05 Apr 2005
Application note Interfacing the VCA8617 with High-Speed ADCs 05 Apr 2005
Application note Interfacing High-Speed LVDS Outputs of the ADS527x/ADS524x 23 Feb 2005
Application note Using the ADSDeSer-50EVM to Deserialize ADS527x 10-Bit Outputs 08 Jul 2004
Application note LVDS Outputs on the ADS527x 10 Jun 2004

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Support-Software

HSADC-SPI-UTILITY — ADS5400 EVM GUI

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ADS527x IBIS Model

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JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

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Bestellen & Qualität

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  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

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Support und Schulungen

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