10.1.1 General Guidelines
The following list includes general layout guidelines. Refer to Figure 86 as needed.
- Route the clock input as a differential pair when a differential clock input is used.
- When single ended inputs are used, place 100-nF capacitors close to the pins on the INx_M inputs to ensure that the reference rail is stable. When differential inputs are used, the inputs must be routed as differential pairs.
- Route the LVDS clock and data output pairs with 100-Ω differential impedance and length matched as per the sampling frequency.