ZHCSH90A January 2015 – December 2017 VSP5324-Q1
PRODUCTION DATA.
ADDRESS | D15 | D14 | D13 | D12 | D11 | D10 | D9 | D8 | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
00 | X(1) | X | X | X | X | X | X | X | X | X | X | X | X | X | X | RST |
01 | X | X | X | X | X | X | X | X | X | X | X | EN_HIGH_ ADDRS |
X | X | X | READOUT |
02 | X | X | EN_SYNC | X | X | X | X | X | X | X | X | X | X | X | X | X |
0A | RAMP_PAT_RESET_VAL | |||||||||||||||
0F | X | X | X | X | X | PDN_PIN_ CFG |
PDN_ COM PLETE |
PDN_ PARTIAL |
PDN_CH4 | X | PDN_CH3 | X | PDN_CH2 | X | PDN_CH1 | X |
14 | X | X | X | X | X | X | X | X | LFNS_CH4 | X | LFNS_CH3 | X | X | LFNS_CH2 | X | LFNS_CH1 |
1C | X | EN_ FRAME_ PAT |
ADCLKOUT[11:0] | X | X | |||||||||||
23 | PRBS_SEED[15:0] | |||||||||||||||
24 | PRBS_SEED[22:16] | X | INVERT_ CH4 |
X | INVERT_ CH3 |
X | X | INVERT_ CH2 |
X | INVERT_ CH1 |
||||||
25 | HARD_ SYNC_TP |
PRBS_ SEED_ FROM_ REG |
X | PRBS_ TP_EN |
X | X | X | TP_SOFT_SYNC | X | EN_RAMP | DUAL_ CUSTOM_ PAT |
SINGLE_ CUSTOM_ PAT |
BITS_CUSTOM2[13:12] | BITS_CUSTOM1[13:12] | ||
26 | BITS_CUSTOM1[9:0] | X | X | X | X | X | X | |||||||||
27 | BITS_CUSTOM2[9:0] | X | X | X | X | X | X | |||||||||
28 | EN_BIT ORDER |
X | X | X | X | X | X | BIT_WISE | EN_WORDWISE_BY_CH[7:0] | |||||||
29 | X | X | X | X | X | X | X | X | X | X | X | X | X | X | GLOBAL_ EN_FILTER |
X |
2A | X | X | X | X | GAIN_CH2[3:0] | X | X | X | X | GAIN_CH1[3:0] | ||||||
2B | X | X | X | X | GAIN_CH3[3:0] | X | X | X | X | GAIN_CH4[3:0] | ||||||
2E | X | HPF_EN_ CH1 |
HPF_CORNER _CH1[3:0] | FILTER1_COEFF_SET[2:0] | FILTER1_RATE[2:0] | X | ODD_TAP1 | X | USE_ FILTER1 |
|||||||
30 | X | HPF_EN_ CH2 |
HPF_CORNER _CH2[3:0] | FILTER2_COEFF_SET[2:0] | FILTER2_RATE[2:0] | X | ODD_TAP2 | X | USE_ FILTER2 |
|||||||
33 | X | HPF_EN_ CH3 |
HPF_CORNER _CH3[3:0] | FILTER3_COEFF_SET[2:0] | FILTER3_RATE[2:0] | X | ODD_TAP3 | X | USE_ FILTER3 |
|||||||
35 | X | HPF_EN_ CH4 |
HPF_CORNER _CH4[3:0] | FILTER4_COEFF_SET[2:0] | FILTER4_RATE[2:0] | X | ODD_TAP4 | X | USE_ FILTER4 |
|||||||
38 | X | X | X | X | X | X | X | X | X | X | X | X | X | X | DATA_RATE[1:0] | |
42 | EN_REF_ VCM0 |
X | X | X | X | X | X | X | X | PHASE_DDR[1:0] | X | EN_REF_ VCM1 |
X | X | X | |
45 | X | X | X | X | X | X | X | X | X | X | X | X | X | X | PAT_SYNC | PAT_ DESKEW |
46 | ENABLE 46 | X | FALL_SDR | X | EN_16BIT | EN_14BIT | EN_12BIT | X | X | X | X | EN_SDR | MSB_ FIRST |
BTC_ MODE |
X | EN_2LANE |
50 | ENABLE 50 | X | X | X | X | X | X | X | MAP_CH12_TO_OUT1B[3:0] | MAP_CH12_TO_OUT1A[3:0] | ||||||
51 | ENABLE 51 | X | X | X | MAP_CH12_TO_OUT2B[3:0] | MAP_CH12_TO_OUT2A[3:0] | X | X | X | X | ||||||
53 | ENABLE 53 | X | X | X | MAP_CH34_TO_OUT3B[3:0] | X | X | X | X | X | X | X | X | |||
54 | ENABLE 54 | X | X | X | X | X | X | X | X | X | X | X | MAP_CH34_TO_OUT3A[3:0] | |||
55 | ENABLE 55 | X | X | X | X | X | X | X | MAP_CH34_TO_OUT4A[3:0] | MAP_CH34_TO_OUT4B[3:0] | ||||||
F0 | EN_EXT_ REF |
X | X | X | X | X | X | X | X | X | X | X | X | X | X | X |