ZHCSH90A January 2015 – December 2017 VSP5324-Q1
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
ANALOG INx_PUT | |||||||
VID | Differential input | Voltage range | 2 | VPP | |||
Resistance, at dc | 2 | kΩ | |||||
Capacitance, at dc | 2.2 | pF | |||||
Analog input bandwidth | 550 | MHz | |||||
Analog input common-mode current (per input pin) | 1.6 | µA/ MSPS |
|||||
VOC | Common-mode output voltage | 0.95 | V | ||||
IO(VCM) | VCM output current capability | 5 | mA | ||||
DC ACCURACY | |||||||
Offset error | ±5 | ±20 | mV | ||||
EGREF | Gain error resulting from internal reference inaccuracy alone | –2 | 2 | %FS | |||
EGCHAN | Gain error of channel alone | 0.5 | %FS | ||||
POWER SUPPLY | |||||||
IAVDD | Analog supply current | 80 MSPS | 114 | 135 | mA | ||
50 MSPS | 86 | mA | |||||
ILVDD | Output buffer supply current | Two-lane LVDS interface, 80 MSPS, 350-mV swing with 100-Ω external termination | 69 | 85 | mA | ||
One-lane LVDS interface, 50 MSPS, 350-mV swing with 100-Ω external termination | 56 | mA | |||||
Analog power | 80 MSPS | 205 | mW | ||||
50 MSPS | 155 | mW | |||||
Digital power LVDS interface | Two-lane LVDS interface, 80 MSPS, 350-mV swing with 100-Ω external termination | 124 | mW | ||||
One-lane LVDS interface, 50 MSPS, 350-mV swing with 100-Ω external termination | 101 | mW | |||||
Total power | 80 MSPS, two-lane LVDS interface | 329 | mW | ||||
50 MSPS, one-lane LVDS interface | 256 | mW | |||||
Global power-down | 40 | mW | |||||
Standby power | 135 | mW |