ZHCSH90A January 2015 – December 2017 VSP5324-Q1
PRODUCTION DATA.
This is a general register.
NOTE
The EN_HIGH_ADDRS bit (register 01h, bit D4) must be set to 1 in order to access this register.
D15 | D14 | D13 | D12 | D11 | D10 | D9 | D8 |
EN_EXT_REF | X | ||||||
R/W-0 | R/W-0 | ||||||
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
X | |||||||
R/W-0 |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
D15 | EN_EXT_REF | R/W | 0 | Reference mode selection 0 = Internal reference mode enabled (default) 1 = External reference mode enabled. The voltage reference can be applied on either the REFP and REFB pins or the VCM pin. |
D7-D0 | X | R/W | 0 | Don't care bits |