SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Module Instance | Power Sleep Controller | Power Domain | Module Domain | Index | Default | Controllable | dependences |
---|---|---|---|---|---|---|---|
JPGENC0 | PSC0 | GP_CORE | LPSC_MAIN_JPEG | 39 | OFF | YES | LPSC_MAIN_IP |
Module Instance | Source | Description |
---|---|---|
JPGENC0 | PSC0 | JPGENC0 reset |
Module Instance | Module Interrupt Signal | Destination Interrupt Input | Destination | Description | Type |
---|---|---|---|---|---|
JPGENC0 | JPGENC0_irq_0 | GICSS0_spi_IN_130 | GICSS0 | JPGENC0 interrupt request | level |
JPGENC0 | JPGENC0_irq_0 | R5FSS0_CORE0_intr_IN_100 | R5FSS0_CORE0 | JPGENC0 interrupt request | level |
JPGENC0 | JPGENC0_irq_0 | WKUP_R5FSS0_CORE0_intr_IN_100 | WKUP_R5FSS0_CORE0 | JPGENC0 interrupt request | level |
JPGENC0 | JPGENC0_irq_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_100 | MCU_R5FSS0_CORE0 | JPGENC0 interrupt request | level |
JPGENC0 | JPGENC0_irq_0 | C7X256V0_CLEC_gic_spi_IN_130 | C7X256V0_CLEC | JPGENC0 interrupt request | level |
JPGENC0 | JPGENC0_irq_0 | C7X256V1_CLEC_gic_spi_IN_130 | C7X256V1_CLEC | JPGENC0 interrupt request | level |
Module Instance | Module Clock Input | Source Clock | Source Control Register | Description |
---|---|---|---|---|
JPGENC0 | CORE_CLK | MAIN_SYSCLK0/2 |