SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
There are 4 bits for ASEL sideband signals. These enable a single SoC to support up to 16 different memory maps. ASEL can be used for two different purposes: it can be used as an indicator of a different memory map (ASEL value 1-12) or indicate transactions requires IO coherency (ASEL value 13-14). ASEL value can be configured either through DMA configuration if the transaction is initiated by DMSS or UTC or DRU or configured through QoS MMR for the initiator who generates the transactions. Refer to QoS Programming Guide.
ASEL value of 0
Non-zero ASEL values
The A53SS checks security on the transactions from the ACP port. However, it does not include supervisor or user mode checks. If different permissions are needed for the supervisor or user mode transactions, different access permissions can be granted using the region-based firewall.
The transactions initiated by the microcontroller do not support IO coherency.