The ECAP module represents one complete capture channel, which has the following independent key resources:
- Dedicated input capture pin
- 32 events selection mapping capability to the input capture pin
- 32-bit time base counter
- 4 × 32-bit time-stamp capture registers
(ECAP0_CAP1 through ECAP0_CAP4)
- 4-stage sequencer (Mod4 counter) that is synchronized to external events, ECAP pin rising/falling edges.
- Independent edge polarity (rising/falling edge) selection for all 4 events
- Input capture signal prescaling (from 2-62)
- One-shot compare register (2 bits) to freeze captures after 1 to 4 time-stamp events
- Control for continuous time-stamp captures using
a 4-deep circular buffer (ECAP0_CAP1 through
ECAP0_CAP4) scheme
- Interrupt capabilities on any of the 4 capture events
Multiple identical ECAP modules can be contained
in a system as shown in Figure 12-248. For actual number of the ECAP modules
integrated in the device, refer to ECAP
Integration. The letter x within a signal or
module name is used to indicate a generic ECAP
instance on a device. For example, output
interrupt request, ECAP1INT belongs to ECAP1,
ECAP2INT belongs to ECAP2, and so forth.