EPWM0 |
EPWM0_epwm_etint_0 |
GICSS0_spi_IN_229 |
GICSS0 |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_etint_0 |
R5FSS0_CORE0_intr_IN_36 |
R5FSS0_CORE0 |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_etint_0 |
WKUP_R5FSS0_CORE0_intr_IN_123 |
WKUP_R5FSS0_CORE0 |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_etint_0 |
MCU_R5FSS0_CORE0_cpu0_intr_IN_36 |
MCU_R5FSS0_CORE0 |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_etint_0 |
C7X256V0_CLEC_gic_spi_IN_229 |
C7X256V0_CLEC |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_etint_0 |
C7X256V1_CLEC_gic_spi_IN_229 |
C7X256V1_CLEC |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_etint_0 |
TIFS0_nvic_IN_68 |
TIFS0 |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_etint_0 |
HSM0_nvic_IN_68 |
HSM0 |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_synco_o_0 |
TIMESYNC_EVENT_INTROUTER0_in_IN_8 |
TIMESYNC_EVENT_INTROUTER0 |
EPWM0 interrupt request |
level |
EPWM0 |
EPWM0_epwm_syncout_0 |
EPWM1_epwm_syncin_IN_0 |
EPWM1 |
EPWM0 interrupt request |
level |
EPWM0 |
EPWM0_epwm_tripzint_0 |
GICSS0_spi_IN_230 |
GICSS0 |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_tripzint_0 |
R5FSS0_CORE0_intr_IN_80 |
R5FSS0_CORE0 |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_tripzint_0 |
WKUP_R5FSS0_CORE0_intr_IN_124 |
WKUP_R5FSS0_CORE0 |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_tripzint_0 |
MCU_R5FSS0_CORE0_cpu0_intr_IN_80 |
MCU_R5FSS0_CORE0 |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_tripzint_0 |
C7X256V0_CLEC_gic_spi_IN_230 |
C7X256V0_CLEC |
EPWM0 interrupt request |
pulse |
EPWM0 |
EPWM0_epwm_tripzint_0 |
C7X256V1_CLEC_gic_spi_IN_230 |
C7X256V1_CLEC |
EPWM0 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_etint_0 |
GICSS0_spi_IN_231 |
GICSS0 |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_etint_0 |
R5FSS0_CORE0_intr_IN_37 |
R5FSS0_CORE0 |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_etint_0 |
WKUP_R5FSS0_CORE0_intr_IN_125 |
WKUP_R5FSS0_CORE0 |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_etint_0 |
MCU_R5FSS0_CORE0_cpu0_intr_IN_37 |
MCU_R5FSS0_CORE0 |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_etint_0 |
C7X256V0_CLEC_gic_spi_IN_231 |
C7X256V0_CLEC |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_etint_0 |
C7X256V1_CLEC_gic_spi_IN_231 |
C7X256V1_CLEC |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_etint_0 |
TIFS0_nvic_IN_69 |
TIFS0 |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_etint_0 |
HSM0_nvic_IN_69 |
HSM0 |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_syncout_0 |
EPWM2_epwm_syncin_IN_0 |
EPWM2 |
EPWM1 interrupt request |
level |
EPWM1 |
EPWM1_epwm_tripzint_0 |
GICSS0_spi_IN_233 |
GICSS0 |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_tripzint_0 |
R5FSS0_CORE0_intr_IN_81 |
R5FSS0_CORE0 |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_tripzint_0 |
WKUP_R5FSS0_CORE0_intr_IN_126 |
WKUP_R5FSS0_CORE0 |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_tripzint_0 |
MCU_R5FSS0_CORE0_cpu0_intr_IN_81 |
MCU_R5FSS0_CORE0 |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_tripzint_0 |
C7X256V0_CLEC_gic_spi_IN_233 |
C7X256V0_CLEC |
EPWM1 interrupt request |
pulse |
EPWM1 |
EPWM1_epwm_tripzint_0 |
C7X256V1_CLEC_gic_spi_IN_233 |
C7X256V1_CLEC |
EPWM1 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_etint_0 |
GICSS0_spi_IN_234 |
GICSS0 |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_etint_0 |
R5FSS0_CORE0_intr_IN_38 |
R5FSS0_CORE0 |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_etint_0 |
WKUP_R5FSS0_CORE0_intr_IN_127 |
WKUP_R5FSS0_CORE0 |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_etint_0 |
MCU_R5FSS0_CORE0_cpu0_intr_IN_38 |
MCU_R5FSS0_CORE0 |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_etint_0 |
C7X256V0_CLEC_gic_spi_IN_234 |
C7X256V0_CLEC |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_etint_0 |
C7X256V1_CLEC_gic_spi_IN_234 |
C7X256V1_CLEC |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_etint_0 |
TIFS0_nvic_IN_70 |
TIFS0 |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_etint_0 |
HSM0_nvic_IN_70 |
HSM0 |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_tripzint_0 |
GICSS0_spi_IN_235 |
GICSS0 |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_tripzint_0 |
R5FSS0_CORE0_intr_IN_82 |
R5FSS0_CORE0 |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_tripzint_0 |
WKUP_R5FSS0_CORE0_intr_IN_148 |
WKUP_R5FSS0_CORE0 |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_tripzint_0 |
MCU_R5FSS0_CORE0_cpu0_intr_IN_82 |
MCU_R5FSS0_CORE0 |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_tripzint_0 |
C7X256V0_CLEC_gic_spi_IN_235 |
C7X256V0_CLEC |
EPWM2 interrupt request |
pulse |
EPWM2 |
EPWM2_epwm_tripzint_0 |
C7X256V1_CLEC_gic_spi_IN_235 |
C7X256V1_CLEC |
EPWM2 interrupt request |
pulse |