SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Module Instance | Power Sleep Controller | Power Domain | Module Domain | Index | Default | Controllable | Dependencies |
---|---|---|---|---|---|---|---|
MCU_CTRL_MMR0 | WKUP_PSC0 | GP_CORE_CTL_MCU | LPSC_MCU_ALWAYSON | 0 | ON | NO | NONE |
J7AEN_MAIN_CTRL_MMR0 | PSC0 | GP_CORE | LPSC_MAIN_ALWAYSON | 0 | ON | NO | |
WKUP_J7AEN_WKUP_CTRL_MMR0 | PSC0 | GP_CORE | LPSC_MAIN_ALWAYSON | 0 | ON | NO |
Module Instance | Source | Description |
---|---|---|
CTRL_MMR0 | PSC0 | CTRL_MMR0 reset |
PLLCTRL0 | ||
MCU_CTRL_MMR0 | WKUP_PSC0 | MCU_CTRL_MMR0 reset |
MCU_PLLCTRL0 | ||
WKUP_CTRL_MMR0 | PSC0 | WKUP_CTRL_MMR0 reset |
PLLCTRL0 |
Module Instance | Module Interrupt Signal | Destination Interrupt Input | Destination | Description | Type |
---|---|---|---|---|---|
MCU_CTRL_MMR0 | MCU_CTRL_MMR0_IPC_SET0_ipc_set_ipcfg_0 | WKUP_R5FSS0_CORE0_intr_IN_0 | WKUP_R5FSS0_CORE0 | MCU_CTRL_MMR0 interrupt request | level |
MCU_CTRL_MMR0 | MCU_CTRL_MMR0_access_err_0 | GICSS0_spi_IN_129 | GICSS0 | MCU_CTRL_MMR0 interrupt request | level |
MCU_CTRL_MMR0 | MCU_CTRL_MMR0_access_err_0 | R5FSS0_CORE0_intr_IN_128 | R5FSS0_CORE0 | MCU_CTRL_MMR0 interrupt request | level |
MCU_CTRL_MMR0 | MCU_CTRL_MMR0_access_err_0 | WKUP_R5FSS0_CORE0_intr_IN_128 | WKUP_R5FSS0_CORE0 | MCU_CTRL_MMR0 interrupt request | level |
MCU_CTRL_MMR0 | MCU_CTRL_MMR0_access_err_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_128 | MCU_R5FSS0_CORE0 | MCU_CTRL_MMR0 interrupt request | level |
MCU_CTRL_MMR0 | MCU_CTRL_MMR0_access_err_0 | C7X256V0_CLEC_gic_spi_IN_129 | C7X256V0_CLEC | MCU_CTRL_MMR0 interrupt request | level |
MCU_CTRL_MMR0 | MCU_CTRL_MMR0_access_err_0 | C7X256V1_CLEC_gic_spi_IN_129 | C7X256V1_CLEC | MCU_CTRL_MMR0 interrupt request | level |
MCU_CTRL_MMR0 | MCU_CTRL_MMR0_access_err_0 | TIFS0_nvic_IN_220 | TIFS0 | MCU_CTRL_MMR0 interrupt request | level |
MCU_CTRL_MMR0 | MCU_CTRL_MMR0_access_err_0 | HSM0_nvic_IN_220 | HSM0 | MCU_CTRL_MMR0 interrupt request | level |
Module Instance | Module Clock Input | Source Clock Signal | Source Control Register | Description |
---|---|---|---|---|
J7AEN_MAIN_CTRL_MMR0 | FICLK | MAIN_SYSCLK0/4 | CTRL_MMR0 Functional and Interface Clock | |
MCU_CTRL_MMR0 | P1500_WRCK | MCU_DFT_SCAN_CLK | ||
FICLK | MCU_SYSCLK0/4 | MCU_CTRL_MMR0 Functional and Interface Clock | ||
WKUP_J7AEN_WKUP_CTRL_MMR0 | FICLK | DM_CLK/4 | WKUP_CLKSEL[0:0] | WKUP_CTRL_MMR0 Functional and Interface Clock |