ZHCSS37J may 2009 – january 2021 XIO2001
PRODUCTION DATA
This read/write register specifies the bus number of the PCI bus segment that the PCI interface is connected to. The bridge uses this register to determine how to respond to a type 1 configuration transaction.
PCI register offset: | 19h | |
Register type: | Read/Write | |
Default value: | 00h |
BIT NUMBER | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESET STATE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |