ZHCSS37J may 2009 – january 2021 XIO2001
PRODUCTION DATA
The serial-bus data register reads and writes data on the serial-bus interface. Write data is loaded into this register prior to writing the serial-bus slave address register (offset B2h, see Section 8.4.58) that initiates the bus cycle. When reading data from the serial bus, this register contains the data read after bit 5 (REQBUSY) of the serial-bus control and status register (offset B3h, see Section 8.4.59) is cleared. This register is reset by a PCI Express reset ( PERST), a GRST, or the internally-generated power-on reset.
PCI register offset: | B0h | |
Register type: | Read/Write | |
Default value: | 00h |
BIT NUMBER | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESET STATE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |