ZHCSS37J may 2009 – january 2021 XIO2001
PRODUCTION DATA
This read/write register is programmed by the system and indicates to the software which interrupt line the bridge has assigned to it. The default value of this register is FFh, indicating that an interrupt line has not yet been assigned to the function. Since the bridge does not generate interrupts internally, this register is a scratch pad register.
PCI register offset: | 3Ch | |
Register type: | Read/Write | |
Default value: | FFh |
BIT NUMBER | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESET STATE | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |