ZHCSBT2G November 2012 – October 2017 66AK2H06 , 66AK2H12 , 66AK2H14
PRODUCTION DATA.
The programmable address memory protection page attribute register holds the permissions for the region. This register is writeable only by a nondebug supervisor entity. If NS = 0 (secure mode) then the register is also writeable only by a nondebug secure entity. The NS bit is writeable only by a nondebug secure entity. For debug accesses, the register is writeable only when NS = 1 or EMU = 1. The PROGn_MPPAR register is shown in Figure 8-3 and described in Table 8-18. The reset values are listed in Table 8-19 for MPU0-MPU5, Table 8-20 for MPU6-MPU11, and Table 8-21 for MPU12-MPU14.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved | AID15 | AID14 | AID13 | AID12 | AID11 | AID10 | AID9 | AID8 | AID7 | AID6 | |||||
R | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
AID5 | AID4 | AID3 | AID2 | AID1 | AID0 | AIDX | Rsvd | NS | EMU | SR | SW | SX | UR | UW | UX |
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Bits | Name | Description |
---|---|---|
31-26 | Reserved | Reserved. Always read as 0. |
25 | AID15 | Controls access from ID = 15
|
24 | AID14 | Controls access from ID = 14
|
23 | AID13 | Controls access from ID = 13
|
22 | AID12 | Controls access from ID = 12
|
21 | AID11 | Controls access from ID = 11
|
20 | AID10 | Controls access from ID = 10
|
19 | AID9 | Controls access from ID = 9
|
18 | AID8 | Controls access from ID = 8
|
17 | AID7 | Controls access from ID = 7
|
16 | AID6 | Controls access from ID = 6
|
15 | AID5 | Controls access from ID = 5
|
14 | AID4 | Controls access from ID = 4
|
13 | AID3 | Controls access from ID = 3
|
12 | AID2 | Controls access from ID = 2
|
11 | AID1 | Controls access from ID = 1
|
10 | AID0 | Controls access from ID = 0
|
9 | AIDX | Controls access from ID > 15
|
8 | Reserved | Reserved. Always reads as 0. |
7 | NS | Nonsecure access permission
|
6 | EMU | Emulation (debug) access permission. This bit is ignored if NS = 1
|
5 | SR | Supervisor Read permission
|
4 | SW | Supervisor Write permission
|
3 | SX | Supervisor Execute permission
|
2 | UR | User Read permission
|
1 | UW | User Write permission
|
0 | UX | User Execute permission
|
Register | MPU0 | MPU1 | MPU2 | MPU3 | MPU4 | MPU5 |
---|---|---|---|---|---|---|
PROG0_MPPAR | 0x03FF_FCB6 | 0x03FF_FCB6 | 0x03FF_FCB6 | Reserved | Reserved | 0x03FF_FCB4 |
PROG1_MPPAR | 0x03FF_FCB6 | 0x03FF_FCB4 | 0x03FF_FCB4 | Reserved | Reserved | 0x03FF_FCB4 |
PROG2_MPPAR | 0x03FF_FCB6 | 0x03FF_FCA4 | 0x03FF_FCA4 | Reserved | Reserved | 0x03FF_FCA4 |
PROG3_MPPAR | 0x03FF_FCB6 | 0x03FF_FCB4 | 0x03FF_FCB4 | Reserved | Reserved | 0x03FF_FCF4 |
PROG4_MPPAR | 0x03FF_FCB6 | 0x03FF_FCF4 | 0x03FF_FCF4 | Reserved | Reserved | 0x03FF_FCB4 |
PROG5_MPPAR | 0x03FF_FCB6 | 0x03FF_FCB4 | 0x03FF_FCB4 | Reserved | Reserved | 0x03FF_FCB4 |
PROG6_MPPAR | 0x03FF_FCB6 | 0x03FF_FCB4 | 0x03FF_FCB4 | Reserved | Reserved | 0x03FF_FCB4 |
PROG7_MPPAR | 0x03FF_FCB6 | 0x03FF_FCB4 | 0x03FF_FCB4 | Reserved | Reserved | 0x03FF_FCB4 |
PROG8_MPPAR | 0x03FF_FCB6 | 0x03FF_FCB4 | 0x03FF_FCB4 | Reserved | Reserved | 0x03FF_FCF4 |
PROG9_MPPAR | 0x03FF_FCB6 | 0x03FF_FCF4 | 0x03FF_FCF4 | Reserved | Reserved | 0x03FF_FCB4 |
PROG10_MPPAR | 0x03FF_FCB6 | 0x03FF_FCB4 | 0x03FF_FCB4 | Reserved | Reserved | 0x03FF_FCF4 |
PROG11_MPPAR | 0x03FF_FCB6 | 0x03FF_FCF4 | 0x03FF_FCF4 | Reserved | Reserved | 0x03FF_FCF4 |
PROG12_MPPAR | 0x03FF_FCB4 | 0x03FF_FCA4 | 0x03FF_FCA4 | Reserved | Reserved | 0x03FF_FCA4 |
PROG13_MPPAR | 0x03FF_FCB6 | 0x03FF_FCB6 | 0x03FF_FCB6 | Reserved | Reserved | 0x03FF_FCB6 |
PROG14_MPPAR | 0x03FF_FCB0 | 0x03FF_FCA4 | 0x03FF_FCB6 | Reserved | Reserved | 0x03FF_FCA4 |
PROG15_MPPAR | 0x03FF_FCB6 | 0x03FF_FCA4 | 0x03FF_FCB6 | Reserved | Reserved | 0x03FF_FCA4 |
Register | MPU6 | MPU7 | MPU8 | MPU9 | MPU10 | MPU11 |
---|---|---|---|---|---|---|
PROG0_MPPAR | Reserved | 0x03FF_FCB6 | 0x03FF_FCBF | 0x03FF_FCB6 | 0x03FF_FCB6 | 0x03FF_FCB6 |
PROG1_MPPAR | Reserved | 0x03FF_FCBF | 0x03FF_FCBF | 0x03FF_FCB6 | 0x03FF_FCB6 | 0x03FF_FCB0 |
PROG2_MPPAR | Reserved | 0x03FF_FCBF | 0x03FF_FCBF | 0x03FF_FCB6 | N/A | 0x03FF_FCB6 |
PROG3_MPPAR | Reserved | 0x03FF_FCBF | 0x03FF_FCBF | 0x03FF_FCB6 | N/A | 0x03FF_FCB0 |
PROG4_MPPAR | Reserved | 0x03FF_FCBF | 0x03FF_FCBF | 0x03FF_FCB6 | N/A | 0x03FF_FCB0 |
PROG5_MPPAR | Reserved | 0x03FF_FCBF | 0x03FF_FCBF | 0x03FF_FCB6 | N/A | 0x03FF_FCB6 |
PROG6_MPPAR | Reserved | 0x03FF_FCBF | 0x03FF_FCBF | 0x03FF_FCB6 | N/A | 0x03FF_FCB6 |
PROG7_MPPAR | Reserved | 0x03FF_FCBF | 0x03FF_FCB6 | 0x03FF_FCB6 | N/A | 0x03FF_FCB0 |
PROG8_MPPAR | Reserved | 0x03FF_FCBF | N/A | 0x03FF_FCB6 | N/A | 0x03FF_FCB0 |
PROG9_MPPAR | Reserved | 0x03FF_FCBF | N/A | 0x03FF_FCB6 | N/A | 0x03FF_FCB6 |
PROG10_MPPAR | Reserved | 0x03FF_FCBF | N/A | 0x03FF_FCB6 | N/A | 0x03FF_FCB6 |
PROG11_MPPAR | Reserved | 0x03FF_FCBF | N/A | 0x03FF_FCB6 | N/A | 0x03FF_FCB6 |
PROG12_MPPAR | Reserved | 0x03FF_FCBF | N/A | 0x03FF_FCB6 | N/A | 0x03FF_FCB0 |
PROG13_MPPAR | Reserved | 0x03FF_FCBF | N/A | 0x03FF_FCB6 | N/A | 0x03FF_FCB6 |
PROG14_MPPAR | Reserved | 0x03FF_FCBF | N/A | 0x03FF_FCB6 | N/A | 0x03FF_FCB0 |
PROG15_MPPAR | Reserved | 0x03FF_FCBF | N/A | 0x03FF_FCB6 | N/A | 0x03FF_FCB6 |
Register | MPU12 | MPU13 | MPU14 |
---|---|---|---|
PROG0_MPPAR | 0x03FF_FCBF | 0x03FF_FCBF | 0x03FF_FCBF |
PROG1_MPPAR | 0x03FF_FCBF | 0x03FF_FCBF | 0x03FF_FCBF |
PROG2_MPPAR | 0x0000_0000 | 0x0000_0000 | 0x0000_0000 |
PROG3_MPPAR | N/A | N/A | N/A |
PROG4_MPPAR | N/A | N/A | N/A |
PROG5_MPPAR | N/A | N/A | N/A |
PROG6_MPPAR | N/A | N/A | N/A |
PROG7_MPPAR | N/A | N/A | N/A |
PROG8_MPPAR | N/A | N/A | N/A |
PROG9_MPPAR | N/A | N/A | N/A |
PROG10_MPPAR | N/A | N/A | N/A |
PROG11_MPPAR | N/A | N/A | N/A |
PROG12_MPPAR | N/A | N/A | N/A |
PROG13_MPPAR | N/A | N/A | N/A |
PROG14_MPPAR | N/A | N/A | N/A |
PROG15_MPPAR | N/A | N/A | N/A |