The DMA controller resides in the peripheral domain, which must be powered up to enable the µDMA controller. The following steps are necessary:
- Enable the peripheral power domain (PRCM_DOMAIN_PERIPH) by setting the PRCM:PDCTL0PERIPH.ON register bit or by using the driver library function:
PRCMPowerDomainOn(uint32_t ui32Domains)
- Enable the µDMA controller by setting the PRCM:SECDMACLKGR.DMA_CLK_EN register bit and the PRCM:SECDMACLKGS.DMA_CLK_EN register bit or by using the driver library functions:
PRCMPeripheralRunEnable(uint32_t ui32Peripheral)
and
PRCMPeripheralSleepEnable(uint32_t ui32Peripheral)
- Load the setting to clock controller by setting the PRCM:CLKLOADCTL.LOAD register bit or by using the function:
PRCMLoadSet()
- Enable the µDMA controller by setting the DMA Configuration register, UDMA:CFG, MASTERENABLE bit.
- Program the location of the channel control table by writing the base address of the table to the DMA Channel Control Base Pointer register, UDMA:CTRL. The base address must be aligned on a
1024-byte boundary.