ZHCSTD3B June 2022 – October 2023 BQ756506-Q1
PRODUCTION DATA
The VC pins are the input channels for cell voltage measurements from the Main ADC measured in the Cell1 to Cell6 slots of the round robin. The round robin timing is always the same even if fewer than 6 cells are connected to the device (Figure 8-4). That is, for the inactive (or unused) VC channel, the device ignores the respective cell slot, but it does not remove the slot from the round robin cycle. This keeps a consistent measurement timing regardless of the cell number configuration. It also provides a consistent sampling time to the post-ADC digital LPF input.
To determine the number of active VCELL channels for ADC measurement, the ACTIVE_CELL[NUM_CELL3:0] parameter sets the highest active channel number. The device assumes any VC channel below the setting is also active.
The measurement results are reported in the corresponding VCELL*_HI (high-byte) and VCELL*_LO (low-byte) registers, where * = 1 to 6. If the digital LPFs are disabled, the result registers are reported with the single ADC conversion values; otherwise, the result registers are reported with filtered measurement values. For an inactive VC channel, the respective _HI and _LO registers remain with the default value 0x8000.