ZHCSTD3B June 2022 – October 2023 BQ756506-Q1
PRODUCTION DATA
Address | 0x0001 | |||||||
NVM | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
Name | SPARE[1:0] | ADDRESS[5:0] | ||||||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
SPARE[1:0] = | Spare | |||||||
ADDRESS[5:0] = | This register shows the default device address used when
[DIR_SEL] = 1 and programmed in the OTP. Writing to this
register won’t change the device address actively in use. The [DIR_SEL] setting has
no impact on BQ756506-Q1 since it is a standalone device using
UART communication to host system. This register is used for the system to program the device address to OTP, which will be loaded to the DIR1_ADDR register at POR. For programming, follow the OTP programming procedure. |