SPRUJ64 September   2022

 

  1.   Abstract
  2.   Trademarks
  3. 1Key Features
  4. 2AM64x SKEVM Overview
    1. 2.1 Board Version Identification
  5. 3Functional Block Diagram
  6. 4System Description
    1. 4.1  Clocking
      1. 4.1.1 Ethernet PHY Clock
      2. 4.1.2 AM64x SoC Clock
    2. 4.2  Reset
    3. 4.3  Power Requirements
      1. 4.3.1 Power Input
      2. 4.3.2 USB Type-C Interface for Power Input
      3. 4.3.3 Power Fault Indication
      4. 4.3.4 Power Supply
      5. 4.3.5 Power Sequencing
      6. 4.3.6 SOC Power
    4. 4.4  Configuration
      1. 4.4.1 Boot Modes
    5. 4.5  JTAG
    6. 4.6  Test Automation
    7. 4.7  UART Interface
    8. 4.8  Memory Interfaces
      1. 4.8.1 LPDDR4 Interface
      2. 4.8.2 MMC Interface
        1. 4.8.2.1 Micro SD Interface
        2. 4.8.2.2 WiLink Interface
        3. 4.8.2.3 OSPI Interface
        4. 4.8.2.4 Board ID EEPROM Interface
    9. 4.9  Ethernet Interface
      1. 4.9.1 DP83867 PHY Default Configuration
      2. 4.9.2 DP83867 – Power, Clock, Reset, Interrupt, and LEDs
      3. 4.9.3 Industrial Application LEDs for Indication
    10. 4.10 USB 3.0 Interface
    11. 4.11 PRU Connector
    12. 4.12 User Expansion Connector
    13. 4.13 MCU Connector
    14. 4.14 Interrupt
    15. 4.15 I2C Interface
    16. 4.16 IO Expander (GPIOs)
  7. 5Known Issues and Modifications
    1. 5.1 Issue 1 - Silkscreen Missprint on Initial Board Batch
  8. 6Revision History

4.10 USB 3.0 Interface

On the AM64x SKEVM, USB 3.0 HOST interface is offered through USB Type-A Connector (692121030100) which supports a data rate up to 5Gbps. Super-speed differential signals from the Type-A connector are connected to the SERDES-0 block of the SoC through a choke and ESD protection device. USB2.0 Lines of the Type-A connector are directly interfaced to the USB0 port of the AM64x SOC. USB0_DRVVBUS from the SoC enables the 5-V power switch to provide VUSB_TYPEA supply used for the USB Type-A connector.

An ESD protection device meeting the USB 3.0 speed and capacitance specification is included on all USB3.0 Lines (TX_P, RX_P, TX_N, and RX_N) to dissipate ESD strikes. A common mode choke on USB data lines is provided for EMI/EMC. An ESD protection device with part number TPD4S012 is included to dissipate ESD strikes on USB2.0 DP/DM signals.

GUID-F290F8F6-9809-4C74-BF29-187127A020B0-low.png Figure 4-17 USB 3.0 Host Interface