SPRUJ64 September   2022

 

  1.   Abstract
  2.   Trademarks
  3. 1Key Features
  4. 2AM64x SKEVM Overview
    1. 2.1 Board Version Identification
  5. 3Functional Block Diagram
  6. 4System Description
    1. 4.1  Clocking
      1. 4.1.1 Ethernet PHY Clock
      2. 4.1.2 AM64x SoC Clock
    2. 4.2  Reset
    3. 4.3  Power Requirements
      1. 4.3.1 Power Input
      2. 4.3.2 USB Type-C Interface for Power Input
      3. 4.3.3 Power Fault Indication
      4. 4.3.4 Power Supply
      5. 4.3.5 Power Sequencing
      6. 4.3.6 SOC Power
    4. 4.4  Configuration
      1. 4.4.1 Boot Modes
    5. 4.5  JTAG
    6. 4.6  Test Automation
    7. 4.7  UART Interface
    8. 4.8  Memory Interfaces
      1. 4.8.1 LPDDR4 Interface
      2. 4.8.2 MMC Interface
        1. 4.8.2.1 Micro SD Interface
        2. 4.8.2.2 WiLink Interface
        3. 4.8.2.3 OSPI Interface
        4. 4.8.2.4 Board ID EEPROM Interface
    9. 4.9  Ethernet Interface
      1. 4.9.1 DP83867 PHY Default Configuration
      2. 4.9.2 DP83867 – Power, Clock, Reset, Interrupt, and LEDs
      3. 4.9.3 Industrial Application LEDs for Indication
    10. 4.10 USB 3.0 Interface
    11. 4.11 PRU Connector
    12. 4.12 User Expansion Connector
    13. 4.13 MCU Connector
    14. 4.14 Interrupt
    15. 4.15 I2C Interface
    16. 4.16 IO Expander (GPIOs)
  7. 5Known Issues and Modifications
    1. 5.1 Issue 1 - Silkscreen Missprint on Initial Board Batch
  8. 6Revision History

4.1.1 Ethernet PHY Clock

The clock buffer of part number LMK1C1103PWR is used to drive the 25-MHz clock to the Ethernet PHYs. LMK1C1103PWR is a 1:3 LVCMOS clock buffer, which takes a 25-MHz crystal/LVCMOS reference input and provides three 25-MHz LVCMOS clock outputs. The source for the clock buffer will be either the CLKOUT0 pin from the SoC or a 25-MHz oscillator (ECS-2520MV-250-CN-TR); the selection can be made using a set of resistors. By default, the oscillator is used as input to the clock buffer in AM64x SKEVM. Output Y2 and Y3 of the clock buffer LMK1C1103PWR are used as a reference clock input for two Gigabit Ethernet PHYs in SKEVM.

GUID-F8FFACA2-EEFE-478A-9BC3-7312A6184053-low.pngFigure 4-1 AM64x SK EVM Clock Tree
Note: Resistors that are marked with a red color box are DNI.