SPRUJ64 September   2022

 

  1.   Abstract
  2.   Trademarks
  3. 1Key Features
  4. 2AM64x SKEVM Overview
    1. 2.1 Board Version Identification
  5. 3Functional Block Diagram
  6. 4System Description
    1. 4.1  Clocking
      1. 4.1.1 Ethernet PHY Clock
      2. 4.1.2 AM64x SoC Clock
    2. 4.2  Reset
    3. 4.3  Power Requirements
      1. 4.3.1 Power Input
      2. 4.3.2 USB Type-C Interface for Power Input
      3. 4.3.3 Power Fault Indication
      4. 4.3.4 Power Supply
      5. 4.3.5 Power Sequencing
      6. 4.3.6 SOC Power
    4. 4.4  Configuration
      1. 4.4.1 Boot Modes
    5. 4.5  JTAG
    6. 4.6  Test Automation
    7. 4.7  UART Interface
    8. 4.8  Memory Interfaces
      1. 4.8.1 LPDDR4 Interface
      2. 4.8.2 MMC Interface
        1. 4.8.2.1 Micro SD Interface
        2. 4.8.2.2 WiLink Interface
        3. 4.8.2.3 OSPI Interface
        4. 4.8.2.4 Board ID EEPROM Interface
    9. 4.9  Ethernet Interface
      1. 4.9.1 DP83867 PHY Default Configuration
      2. 4.9.2 DP83867 – Power, Clock, Reset, Interrupt, and LEDs
      3. 4.9.3 Industrial Application LEDs for Indication
    10. 4.10 USB 3.0 Interface
    11. 4.11 PRU Connector
    12. 4.12 User Expansion Connector
    13. 4.13 MCU Connector
    14. 4.14 Interrupt
    15. 4.15 I2C Interface
    16. 4.16 IO Expander (GPIOs)
  7. 5Known Issues and Modifications
    1. 5.1 Issue 1 - Silkscreen Missprint on Initial Board Batch
  8. 6Revision History

4.2 Reset

The AM64x SoC has the following resets:

  • RESETSTATz is the warm reset status output for Main domain.
  • PORz_OUT is the power ON reset status output from Main and MCU domain.
  • MCU_PORz is the power ON / Cold Reset input for MCU and Main domain.
  • MCU_RESETz is the Warm Reset input for MCU domain.
  • MCU_RESETSTATz is the Warm Reset status output for MCU domain.

The SoC_PORz signal is provided by ANDing the PGOOD signals of the PMIC and JTAG emulator reset. MCU_PORz is provided by ANDing the CONN_MCU_PORz from the MCU Connector, TEST_PORZn from the Test Automation Connector, and SoC_PORz.

MCU Domain warm reset (MCU_RESETz) and MCU Domain cold reset (MCU_PORz) of the SoC is achieved by CONN_MCU_RESETz and CONN_MCU_PORz, respectively, from the Safety Connector.

Upon Power on Reset, all peripheral devices connected to the main domain are reset by RESETSTATz, along with a GPIO control as shown in Figure 4-2.

GUID-CEF9D5A9-AD37-4029-B2E0-8650F1D66C72-low.png Figure 4-2 Reset Architecture of the AM64x SK Evem