SPRUJ64 September 2022
The two UART ports MAIN_UART0 and MCU_UART0 provided by AM64x are connected to two channel USB to UART Bridge (CP2105) and terminated to a USB Micro B Connector J11. Two ports of the CP2105 are connected to MAIN_UART0 and MCU_UART0 with the RXD, TXD, RTS, and CTS signals.
The USB interface circuit is used in bus powered configuration and a voltage translator (SN74AVC4T245) is used to isolate AM64x IOs. The CP2105 includes an on-chip 5-V to 3.45-V voltage regulator. LD18 is used to indicate power good status of CP2105. This allows the CP2105 to be configured as a USB bus-powered device. The voltage regulator output appears on the VDD pin and can be used to drive the IO supply and one of the supply rails of the voltage translator. Internally, the same VDD is used to operate the core section of CP2105. CP2105 also includes an integrated clock and hence no external crystal is required. MAIN_UART0 and MCU_UART0 from SOC are at 3.3-V IO level. The devices use the internal POR circuit. For normal operation, the nRST pin must be pulled up to 3V3 supply through the 10K resistor. Because the device operates in bus powered configuration, VBUS from the USB connector must be connected to the “REGIN” pin of CP2105 to serve as the input for the internal regulator.
A ESD protection is provided on USB signals to steer ESD current pulses to VCC or GND. TPD4E004 protects against ESD pulses up to ±15-kV Human-Body Model (HBM) as specified in IEC 61000-4-2 and provides ±8-kV contact discharge and ±12- kV air-gap Discharge.
Figure 4-7 shows the dual UART to USB bridge connection with AM64x.